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Message-ID: <9c7e43c3-24e9-4b08-a6ce-2035b50226f4@mailbox.org>
Date: Thu, 23 Oct 2025 09:03:07 +0200
From: Stefan Roese <stefan.roese@...lbox.org>
To: "Musham, Sai Krishna" <sai.krishna.musham@....com>,
"mani@...nel.org" <mani@...nel.org>,
"Havalige, Thippeswamy" <thippeswamy.havalige@....com>
Cc: Bjorn Helgaas <helgaas@...nel.org>, "Bandi, Ravi Kumar"
<ravib@...zon.com>, "lpieralisi@...nel.org" <lpieralisi@...nel.org>,
"bhelgaas@...gle.com" <bhelgaas@...gle.com>,
"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
"kwilczynski@...nel.org" <kwilczynski@...nel.org>,
"robh@...nel.org" <robh@...nel.org>, "Simek, Michal" <michal.simek@....com>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"stable@...r.kernel.org" <stable@...r.kernel.org>,
Sean Anderson <sean.anderson@...ux.dev>,
"Yeleswarapu, Nagaradhesh" <nagaradhesh.yeleswarapu@....com>
Subject: Re: [PATCH v2] PCI: xilinx-xdma: Enable INTx interrupts
On 10/23/25 08:35, Musham, Sai Krishna wrote:
> [AMD Official Use Only - AMD Internal Distribution Only]
>
>> -----Original Message-----
>> From: Stefan Roese <stefan.roese@...lbox.org>
>> Sent: Wednesday, October 22, 2025 7:08 PM
>> To: Musham, Sai Krishna <sai.krishna.musham@....com>; mani@...nel.org;
>> Havalige, Thippeswamy <thippeswamy.havalige@....com>
>> Cc: Bjorn Helgaas <helgaas@...nel.org>; Bandi, Ravi Kumar
>> <ravib@...zon.com>; lpieralisi@...nel.org; bhelgaas@...gle.com; linux-
>> pci@...r.kernel.org; kwilczynski@...nel.org; robh@...nel.org; Simek, Michal
>> <michal.simek@....com>; linux-arm-kernel@...ts.infradead.org; linux-
>> kernel@...r.kernel.org; stable@...r.kernel.org; Sean Anderson
>> <sean.anderson@...ux.dev>; Yeleswarapu, Nagaradhesh
>> <nagaradhesh.yeleswarapu@....com>
>> Subject: Re: [PATCH v2] PCI: xilinx-xdma: Enable INTx interrupts
>>
>> Caution: This message originated from an External Source. Use proper caution
>> when opening attachments, clicking links, or responding.
>>
>>
>> On 10/22/25 14:48, Musham, Sai Krishna wrote:
>>> [AMD Official Use Only - AMD Internal Distribution Only]
>>
>> <snip>
>>
>>>>> We even don’t need ravi patch, as we have tested this at our end it
>>>>> works fine by just updating interrupt-map Property. We need to now
>>>>> understand the
>>>> difference in design.
>>>>
>>>> Ok, please let us know with your findings. In the meantime, I'll keep
>>>> Ravi's patch in tree, as it seems to be required on his setup.
>>>>
>>>
>>> We tested on Linux version 6.12.40 without applying either Stefan's or Ravi's
>> patches.
>>> Instead, we applied only the following interrupt-map property change
>>> (entries 0,1,2,3) and verified that legacy interrupts are working correctly.
>>>
>>> interrupt-map = <0 0 0 1 &pcie_intc_0 0>,
>>> <0 0 0 2 &pcie_intc_0 1>,
>>> <0 0 0 3 &pcie_intc_0 2>,
>>> <0 0 0 4 &pcie_intc_0 3>;
>>>
>>> 38: 1143 0 pl_dma:RC-Event 16 Level 80000000.axi-pcie
>>> 39: 1143 0 pl_dma:INTx 0 Level nvme0q0, nvme0q1
>>
>> Okay. Same here. I don't need Ravi's patch for the INTx bit enabling.
>>
>> I understand that you want us to change the interrupt map in the auto- generated
>> device-tree from Vivado. Which is IMHO a bit "suboptimal".
>>
>> I would prefer to have a solution which works out-of-the-box, w/o the need to
>> manually change DT properties. Is it planned to change / fix this interrupt map in
>> pl.dtsi generated with a newer version of Vivado?
>>
>
> Yes Stefan, this will be fixed in the newer versions and the auto-generated
> device tree will include the correct interrupt-map property entries.
Understood. And thanks the update on this.
@Bjorn & Mani, this patch can be dropped then.
Thanks,
Stefan
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