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Message-ID: <b35l5nwswf6t4k32edqccytrfjbvaloqoh4hksfkqrqmrsx4ee@3aatdgwmxp4g>
Date: Thu, 23 Oct 2025 14:56:49 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
To: yuanjie yang <yuanjie.yang@....qualcomm.com>
Cc: robin.clark@....qualcomm.com, lumag@...nel.org, abhinav.kumar@...ux.dev,
sean@...rly.run, marijn.suijten@...ainline.org, airlied@...il.com,
simona@...ll.ch, maarten.lankhorst@...ux.intel.com, mripard@...nel.org,
tzimmermann@...e.de, robh@...nel.org, krzk+dt@...nel.org,
conor+dt@...nel.org, quic_mkrishn@...cinc.com, jonathan@...ek.ca,
quic_khsieh@...cinc.com, neil.armstrong@...aro.org,
linux-arm-msm@...r.kernel.org, dri-devel@...ts.freedesktop.org,
freedreno@...ts.freedesktop.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, tingwei.zhang@....qualcomm.com,
aiqun.yu@....qualcomm.com, yongxing.mou@....qualcomm.com
Subject: Re: [PATCH 02/12] drm/msm/dpu: Add support for Kaanapali DPU
On Thu, Oct 23, 2025 at 03:53:51PM +0800, yuanjie yang wrote:
> From: Yuanjie Yang <yuanjie.yang@....qualcomm.com>
>
> Add support for Display Processing Unit (DPU) version 13.0
> on the Kaanapali platform. This version introduces changes
> to the SSPP sub-block structure. Add common block and rectangle
> blocks to accommodate these structural modifications for compatibility.
This needs to come up differently: first implement driver changes for
the changed SSPP blocks, then add Kaananapali catalog entries.
>
> Signed-off-by: Yongxing Mou <yongxing.mou@....qualcomm.com>
> Signed-off-by: Yuanjie Yang <yuanjie.yang@....qualcomm.com>
> ---
> .../disp/dpu1/catalog/dpu_13_0_kaanapali.h | 492 ++++++++++++++++++
> .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 44 ++
> .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 29 +-
> drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 1 +
> 4 files changed, 565 insertions(+), 1 deletion(-)
> create mode 100644 drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_13_0_kaanapali.h
>
> +
> +static const struct dpu_cwb_cfg kaanapali_cwb[] = {
> + {
> + .name = "cwb_0", .id = CWB_0,
> + .base = 0x169200, .len = 0x20,
> + },
> + {
> + .name = "cwb_1", .id = CWB_1,
> + .base = 0x169600, .len = 0x20,
> + },
> + {
> + .name = "cwb_2", .id = CWB_2,
> + .base = 0x16A200, .len = 0x20,
> + },
> + {
> + .name = "cwb_3", .id = CWB_3,
> + .base = 0x16A600, .len = 0x20,
lowercase hex
> + },
> +};
> +
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> index 6641455c4ec6..5a24ed0f818c 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> @@ -241,6 +241,25 @@ static const u32 wb2_formats_rgb_yuv[] = {
> .rotation_cfg = NULL, \
> }
>
> +/* kaanapali SSPP common configuration */
> +#define _KAANAPALI_VIG_SBLK(scaler_ver) \
And then it gets reused for some other platform... No. Please come up
with a generic enough name.
> + { \
> + .cmn_blk = {.name = "cmn_blk", \
> + .base = 0, .len = 0x100,}, \
No, sblks shouldn't have .base set to 0. It's the main block.
> + .sspp_rec0_blk = {.name = "sspp_rec0", \
> + .base = 0x1000, .len = 0x180,}, \
> + .csc_blk = {.name = "csc", \
> + .base = 0x1800, .len = 0x100,}, \
> + .scaler_blk = {.name = "scaler", \
> + .version = scaler_ver, \
> + .base = 0x2000, .len = 0xec,}, \
> + .sspp_rec1_blk = {.name = "sspp_rec1", \
> + .base = 0x3000, .len = 0x180,}, \
> + .format_list = plane_formats_yuv, \
> + .num_formats = ARRAY_SIZE(plane_formats_yuv), \
> + .rotation_cfg = NULL, \
> + }
> +
> #define _VIG_SBLK_ROT(scaler_ver, rot_cfg) \
> { \
> .scaler_blk = {.name = "scaler", \
> @@ -329,6 +348,9 @@ static const struct dpu_sspp_sub_blks dpu_vig_sblk_qseed3_3_3 =
> static const struct dpu_sspp_sub_blks dpu_vig_sblk_qseed3_3_4 =
> _VIG_SBLK(SSPP_SCALER_VER(3, 4));
>
> +static const struct dpu_sspp_sub_blks dpu_vig_sblk_qseed3_3_5 =
> + _KAANAPALI_VIG_SBLK(SSPP_SCALER_VER(3, 5));
> +
> static const struct dpu_sspp_sub_blks dpu_rgb_sblk = _RGB_SBLK();
>
> static const struct dpu_sspp_sub_blks dpu_dma_sblk = _DMA_SBLK();
> @@ -412,6 +434,11 @@ static const struct dpu_pingpong_sub_blks sc7280_pp_sblk = {
> .len = 0x20, .version = 0x20000},
> };
>
> +static const struct dpu_pingpong_sub_blks kaanapali_pp_sblk = {
> + .dither = {.name = "dither", .base = 0xc0,
> + .len = 0x40, .version = 0x30000},
> +};
> +
> /*************************************************************
> * DSC sub blocks config
> *************************************************************/
> @@ -452,6 +479,13 @@ static const struct dpu_cdm_cfg dpu_cdm_5_x = {
> .base = 0x79200,
> };
>
> +static const struct dpu_cdm_cfg dpu_cdm_kaanapali_x = {
13_x
> + .name = "cdm_0",
> + .id = CDM_0,
> + .len = 0x240,
> + .base = 0x19e000,
> +};
> +
> /*************************************************************
> * VBIF sub blocks config
> *************************************************************/
> @@ -639,6 +673,10 @@ static const struct dpu_qos_lut_entry sc7180_qos_linear[] = {
> {.fl = 0, .lut = 0x0011222222335777},
> };
>
> +static const struct dpu_qos_lut_entry kaanapali_qos_linear[] = {
> + {.fl = 0, .lut = 0x0011223344556666},
> +};
> +
> static const struct dpu_qos_lut_entry sm6350_qos_linear_macrotile[] = {
> {.fl = 0, .lut = 0x0011223445566777 },
> };
> @@ -668,6 +706,10 @@ static const struct dpu_qos_lut_entry sc7180_qos_macrotile[] = {
> {.fl = 0, .lut = 0x0011223344556677},
> };
>
> +static const struct dpu_qos_lut_entry kaanapali_qos_macrotile[] = {
> + {.fl = 0, .lut = 0x0011223344556666},
> +};
> +
> static const struct dpu_qos_lut_entry sc8180x_qos_macrotile[] = {
> {.fl = 10, .lut = 0x0000000344556677},
> };
> @@ -726,3 +768,5 @@ static const struct dpu_qos_lut_entry sc7180_qos_nrt[] = {
>
> #include "catalog/dpu_10_0_sm8650.h"
> #include "catalog/dpu_12_0_sm8750.h"
> +#include "catalog/dpu_13_0_kaanapali.h"
> +
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> index f0768f54e9b3..99c81c24630f 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> @@ -208,6 +208,30 @@ struct dpu_dsc_blk {
> u32 len;
> };
>
> +/**
> + * struct dpu_sspp_rec_blk - sspp rec sub-blk information
SSPP, REC
> + * @name: string name for debug purposes
> + * @base: offset of this sub-block relative to the block offset
> + * @len: register block length of this sub-block
> + */
> +struct dpu_sspp_rec_blk {
> + char name[DPU_HW_BLK_NAME_LEN];
> + u32 base;
> + u32 len;
> +};
> +
> +/**
> + * struct dpu_sspp_cmn_blk - sspp common sub-blk information
> + * @name: string name for debug purposes
> + * @base: offset of this sub-block relative to the block offset
> + * @len: register block length of this sub-block
> + */
> +struct dpu_sspp_cmn_blk {
> + char name[DPU_HW_BLK_NAME_LEN];
> + u32 base;
> + u32 len;
> +};
> +
> /**
> * enum dpu_qos_lut_usage - define QoS LUT use cases
> */
> @@ -294,7 +318,9 @@ struct dpu_sspp_sub_blks {
> u32 qseed_ver;
> struct dpu_scaler_blk scaler_blk;
> struct dpu_pp_blk csc_blk;
> -
> + struct dpu_sspp_cmn_blk cmn_blk;
> + struct dpu_sspp_rec_blk sspp_rec0_blk;
> + struct dpu_sspp_rec_blk sspp_rec1_blk;
> const u32 *format_list;
> u32 num_formats;
> const struct dpu_rotation_cfg *rotation_cfg;
> @@ -778,6 +804,7 @@ extern const struct dpu_mdss_cfg dpu_sa8775p_cfg;
> extern const struct dpu_mdss_cfg dpu_sm8550_cfg;
> extern const struct dpu_mdss_cfg dpu_sm8650_cfg;
> extern const struct dpu_mdss_cfg dpu_sm8750_cfg;
> +extern const struct dpu_mdss_cfg dpu_kaanapali_cfg;
> extern const struct dpu_mdss_cfg dpu_x1e80100_cfg;
>
> #endif /* _DPU_HW_CATALOG_H */
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
> index 4e5a8ecd31f7..15bec44324d5 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
> @@ -1505,6 +1505,7 @@ static const struct dev_pm_ops dpu_pm_ops = {
> };
>
> static const struct of_device_id dpu_dt_match[] = {
> + { .compatible = "qcom,kaanapali-dpu", .data = &dpu_kaanapali_cfg, },
> { .compatible = "qcom,msm8917-mdp5", .data = &dpu_msm8917_cfg, },
> { .compatible = "qcom,msm8937-mdp5", .data = &dpu_msm8937_cfg, },
> { .compatible = "qcom,msm8953-mdp5", .data = &dpu_msm8953_cfg, },
> --
> 2.34.1
>
--
With best wishes
Dmitry
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