[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-ID: <20251024192903.GA1360890@bhelgaas>
Date: Fri, 24 Oct 2025 14:29:03 -0500
From: Bjorn Helgaas <helgaas@...nel.org>
To: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Krzysztof Wilczyński <kwilczynski@...nel.org>,
Manivannan Sadhasivam <mani@...nel.org>,
Krishna Chaitanya Chundru <krishna.chundru@....qualcomm.com>,
Ron Economos <re@...z.net>, "Maciej W. Rozycki" <macro@...am.me.uk>,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>,
Guenter Roeck <linux@...ck-us.net>,
Christian Zigotzky <chzigotzky@...osoft.de>,
FUKAUMI Naoki <naoki@...xa.com>,
Herve Codina <herve.codina@...tlin.com>,
Diederik de Haas <diederik@...ow-tech.com>,
Dragan Simic <dsimic@...jaro.org>, Johan Hovold <johan@...nel.org>,
linuxppc-dev@...ts.ozlabs.org, linux-rockchip@...ts.infradead.org,
linux-mips@...r.kernel.org
Subject: [GIT PULL] PCI fixes for v6.18
The following changes since commit 3a8660878839faadb4f1a6dd72c3179c1df56787:
Linux 6.18-rc1 (2025-10-12 13:42:36 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git tags/pci-v6.18-fixes-3
for you to fetch changes up to df5192d9bb0e38bf831fb93e8026e346aa017ca8:
PCI/ASPM: Enable only L0s and L1 for devicetree platforms (2025-10-23 20:08:14 -0500)
----------------------------------------------------------------
- Add DWC custom pci_ops for the root bus instead of overwriting the DBI
base address, which broke drivers that rely on the DBI address for iATU
programming; fixes an FU740 probe regression (Krishna Chaitanya Chundru)
- Revert qcom ECAM enablement, which is rendered unnecessary by the DWC
custom pci_ops (Krishna Chaitanya Chundru)
- Fix longstanding MIPS Malta resource registration issues to avoid
exposing them when the next commit fixes the boot failure (Maciej W.
Rozycki)
- Use pcibios_align_resource() on MIPS Malta to fix boot failure caused by
using the generic pci_enable_resources() (Ilpo Järvinen)
- Enable only ASPM L0s and L1, not L1 PM Substates, for devicetree
platforms because we lack information required to configure L1 Substates;
fixes regressions on powerpc and rockchip. A qcom regression (L1
Substates no longer enabled) remains and will be addressed next (Bjorn
Helgaas)
----------------------------------------------------------------
Bjorn Helgaas (1):
PCI/ASPM: Enable only L0s and L1 for devicetree platforms
Ilpo Järvinen (1):
MIPS: Malta: Use pcibios_align_resource() to block io range
Krishna Chaitanya Chundru (2):
PCI: dwc: Use custom pci_ops for root bus DBI vs ECAM config access
Revert "PCI: qcom: Prepare for the DWC ECAM enablement"
Maciej W. Rozycki (2):
MIPS: Malta: Fix keyboard resource preventing i8042 driver from registering
MIPS: Malta: Fix PCI southbridge legacy resource reservations
arch/mips/mti-malta/malta-setup.c | 4 +-
arch/mips/pci/pci-malta.c | 3 +-
drivers/pci/controller/dwc/pcie-designware-host.c | 28 ++++++++--
drivers/pci/controller/dwc/pcie-qcom.c | 68 -----------------------
drivers/pci/pcie/aspm.c | 34 +++---------
5 files changed, 36 insertions(+), 101 deletions(-)
Powered by blists - more mailing lists