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Message-ID: <de1ec7fcc1711e3062cc321ab55552339630de30.camel@redhat.com>
Date: Fri, 24 Oct 2025 16:00:02 -0500
From: Crystal Wood <crwood@...hat.com>
To: Sebastian Andrzej Siewior <bigeasy@...utronix.de>, Thomas Gleixner
	 <tglx@...utronix.de>
Cc: Lukas Wunner <lukas@...ner.de>, Ingo Molnar <mingo@...hat.com>, Peter
 Zijlstra <peterz@...radead.org>, Juri Lelli <juri.lelli@...hat.com>,
 Vincent Guittot	 <vincent.guittot@...aro.org>, Clark Williams
 <clrkwllms@...nel.org>, Steven Rostedt <rostedt@...dmis.org>, Dietmar
 Eggemann <dietmar.eggemann@....com>, Ben Segall	 <bsegall@...gle.com>, Mel
 Gorman <mgorman@...e.de>, Valentin Schneider	 <vschneid@...hat.com>,
 linux-kernel@...r.kernel.org, Attila Fazekas	 <afazekas@...hat.com>,
 linux-pci@...r.kernel.org, 	linux-rt-devel@...ts.linux.dev, Bjorn Helgaas
 <helgaas@...nel.org>, Mahesh J Salgaonkar <mahesh@...ux.ibm.com>, Oliver
 OHalloran <oohall@...il.com>
Subject: Re: [PATCH] genirq/manage: Reduce priority of forced secondary IRQ
 handler

On Fri, 2025-10-24 at 15:33 +0200, Sebastian Andrzej Siewior wrote:
> On 2025-10-03 13:25:53 [-0500], Crystal Wood wrote:
> > On Sun, 2025-09-21 at 15:12 +0200, Lukas Wunner wrote:
> > > On Sat, Sep 20, 2025 at 11:20:26PM +0200, Thomas Gleixner wrote:
> > > > I obviously understand that the proposed change squashs the whole class
> > > > of similar (not yet detected) issues, but that made me look at that
> > > > particular instance nevertheless.
> > > > 
> > > > All aer_irq() does is reading two PCI config words, writing one and then
> > > > sticking 64bytes into a KFIFO. All of that is hard interrupt safe. So
> > > > arguably this AER problem can be nicely solved by the below one-liner,
> > > > no?
> > > 
> > > The one-liner (which sets IRQF_NO_THREAD) was what Crystal originally
> > > proposed:
> > > 
> > > https://lore.kernel.org/r/20250902224441.368483-1-crwood@redhat.com/
> > 
> > So, is the plan to apply the original patch then?
> 
> Did we settle on something?
> I wasn't sure if you can mix IRQF_NO_THREAD with IRQF_ONESHOT for shared
> handlers. If that is a thing, we Crystal's original would do it.

Do you mean mixing IRQF_NO_THREAD on this irq (which should eliminate
the forced IRQF_ONESHOT) with another shared irq that still has
IRQF_ONESHOT?

I suspect it was a non-issue because of IRQCHIP_ONESHOT_SAFE disabling
the forced oneshot (the other irq was pciehp).  Given that these are
pcie-specific, do they ever get used without MSI (which sets
IRQCHIP_ONESHOT_SAFE)[1]?

The issue seems to be that the type of oneshot we want for forced
threading (unmask after the first user-supplied handler) is different
from what we want for explicit IRQF_ONESHOT (unmask after the last
user-supplied handler).  If we separated those, then the semantics
would better match non-RT, and we'd only need to care about mixing
when it comes to explicit IRQF_NOSHOT.

> Then there is the question if we want to go the "class" problem to
> ensure that one handler can preempt the other.  And maybe I should
> clean up few ones tglx pointed out that provide a primary handler for
> no reason…

Either way works for me, as long as we pick at least one :-)

-Crystal

[1] I realize that the answer to "has any hardware designer ever
done this weird and bad thing?" is usually yes. :-P


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