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Message-ID: <b48b7ec8-09dd-fce4-c957-5fbbf66acd4e@xenosoft.de>
Date: Fri, 24 Oct 2025 06:28:11 +0200
From: Christian Zigotzky <chzigotzky@...osoft.de>
To: Bjorn Helgaas <helgaas@...nel.org>, linux-pci@...r.kernel.org
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@....qualcomm.com>,
FUKAUMI Naoki <naoki@...xa.com>, Herve Codina <herve.codina@...tlin.com>,
Diederik de Haas <diederik@...ow-tech.com>, Dragan Simic
<dsimic@...jaro.org>, linuxppc-dev@...ts.ozlabs.org,
linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org,
Bjorn Helgaas <bhelgaas@...gle.com>, mad skateman <madskateman@...il.com>,
hypexed@...oo.com.au, "R.T.Dickinson" <rtd2@...a.co.nz>
Subject: Re: [PATCH] PCI/ASPM: Enable only L0s and L1 for devicetree platforms
On 23/10/25 20:25, Bjorn Helgaas wrote:
>> ---
>> I intend this for v6.18-rc3.
>>
>> I think it will fix the issues reported by Diederik and FUKAUMI
Naoki (both
>> on Rockchip). I hope it will fix Christian's report on powerpc, but
don't
>> have confirmation.
>>
Hello Bjorn,
Thanks a lot for fixing the issue. :-)
I will test the RC3 of kernel 6.18 with activated CONFIG_PCIEASPM and
CONFIG_PCIEASPM_DEFAULT next week.
Have a nice weekend,
Christian
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