[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-ID: <27fed8ce-11d7-cd8c-b0e2-b89b11fa3c5a@kernel.org>
Date: Sat, 25 Oct 2025 01:04:21 -0600 (MDT)
From: Paul Walmsley <pjw@...nel.org>
To: torvalds@...ux-foundation.org
cc: linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: [GIT PULL] RISC-V updates for v6.18-rc3
Linus,
The following changes since commit fe69107ec7d8b946ab413cfe118984dac8f1a0d8:
Merge tag 'riscv-for-linux-6.18-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux (2025-10-17 12:59:31 -1000)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux tags/riscv-for-linus-6.18-rc3
for you to fetch changes up to b7776a802f2f80139f96530a489dd00fd7089eda:
riscv: hwprobe: avoid uninitialized variable use in hwprobe_arch_id() (2025-10-18 09:36:36 -0600)
- Paul
----------------------------------------------------------------
RISC-V updates for v6.18-rc3
Several RISC-V fixes for v6.18-rc3:
- Close a race during boot between userspace vDSO usage and some
late-initialized vDSO data
- Improve performance on systems with non-CPU-cache-coherent
DMA-capable peripherals by enabling write combining on
pgprot_dmacoherent() allocations
- Add human-readable detail for RISC-V IPI tracing
- Provide more information to zsmalloc on 64-bit RISC-V to improve
allocation
- Silence useless boot messages about CPUs that have been disabled in
DT
- Resolve some compiler and smatch warnings and remove a redundant macro
----------------------------------------------------------------
Anup Patel (2):
RISC-V: Define pgprot_dmacoherent() for non-coherent devices
RISC-V: Don't print details of CPUs disabled in DT
Jingwei Wang (1):
riscv: hwprobe: Fix stale vDSO data for late-initialized keys at boot
Paul Walmsley (3):
riscv: add a forward declaration for cpuinfo_op
riscv: cpufeature: avoid uninitialized variable in has_thead_homogeneous_vlenb()
riscv: hwprobe: avoid uninitialized variable use in hwprobe_arch_id()
Samuel Holland (3):
riscv: Register IPI IRQs with unique names
riscv: mm: Define MAX_POSSIBLE_PHYSMEM_BITS for zsmalloc
riscv: Remove the PER_CPU_OFFSET_SHIFT macro
Sunil V L (1):
ACPI: RIMT: Fix unused function warnings when CONFIG_IOMMU_API is disabled
arch/riscv/include/asm/asm.h | 8 +-
arch/riscv/include/asm/cpufeature.h | 2 +
arch/riscv/include/asm/hwprobe.h | 7 ++
arch/riscv/include/asm/pgtable-64.h | 2 +
arch/riscv/include/asm/pgtable.h | 2 +
arch/riscv/include/asm/vdso/arch_data.h | 6 ++
arch/riscv/kernel/cpu.c | 4 +-
arch/riscv/kernel/cpufeature.c | 4 +-
arch/riscv/kernel/smp.c | 24 +++---
arch/riscv/kernel/sys_hwprobe.c | 76 +++++++++++++++---
arch/riscv/kernel/unaligned_access_speed.c | 9 ++-
arch/riscv/kernel/vdso/hwprobe.c | 2 +-
drivers/acpi/riscv/rimt.c | 122 ++++++++++++++---------------
13 files changed, 168 insertions(+), 100 deletions(-)
vmlinux size differences (from 6f3b6e91f720):
text data bss dec hex filename
+140 +152 . +292 +124 vmlinux.defconfig.gcc-15
+144 +120 . +264 +108 vmlinux.nosmp_defconfig.gcc-15
+76 +160 . +236 +ec vmlinux.rv32_defconfig.gcc-15
+168 +88 . +256 +100 vmlinux.rv32_nosmp_defconfig.gcc-15
+76 +16 . +92 +5c vmlinux.nommu_virt_defconfig.gcc-15
+140 +152 . +292 +124 vmlinux.defconfig.gcc-14
+144 +120 . +264 +108 vmlinux.nosmp_defconfig.gcc-14
+76 +160 . +236 +ec vmlinux.rv32_defconfig.gcc-14
+168 +88 . +256 +100 vmlinux.rv32_nosmp_defconfig.gcc-14
+76 +16 . +92 +5c vmlinux.nommu_virt_defconfig.gcc-14
+356 +84 . +440 +1b8 vmlinux.defconfig.clang-20
+340 +116 . +456 +1c8 vmlinux.nosmp_defconfig.clang-20
+400 +80 . +480 +1e0 vmlinux.rv32_defconfig.clang-20
+376 +112 . +488 +1e8 vmlinux.rv32_nosmp_defconfig.clang-20
+48 +80 . +128 +80 vmlinux.nommu_virt_defconfig.clang-20
+328 +116 . +444 +1bc vmlinux.defconfig.clang-19
+344 +76 . +420 +1a4 vmlinux.nosmp_defconfig.clang-19
+424 +84 . +508 +1fc vmlinux.rv32_defconfig.clang-19
+396 +76 . +472 +1d8 vmlinux.rv32_nosmp_defconfig.clang-19
+60 +16 . +76 +4c vmlinux.nommu_virt_defconfig.clang-19
-100 +80 . -20 -14 vmlinux.allnoconfig.gcc-14
x x x x x vmlinux.allmodconfig.gcc-14
Powered by blists - more mailing lists