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Message-ID: <20251025101258.2793179-1-huangchenghai2@huawei.com>
Date: Sat, 25 Oct 2025 18:12:54 +0800
From: Chenghai Huang <huangchenghai2@...wei.com>
To: <herbert@...dor.apana.org.au>, <davem@...emloft.net>
CC: <linux-kernel@...r.kernel.org>, <linux-crypto@...r.kernel.org>,
	<linuxarm@...neuler.org>, <liulongfang@...wei.com>, <qianweili@...wei.com>,
	<wangzhou1@...ilicon.com>, <fanghao11@...wei.com>, <nieweiqiang@...wei.com>
Subject: [PATCH 0/4] crypto: hisilicon - various cleanup for QM and SGL

This patch series addresses several issues in the hisilicon crypto
driver:
Patch 1: ensures proper synchronization when reading eqe/aeqe
values by saving the complete 4-byte values atomically. This
guarantees the valid bit and queue number are read as a consistent
pair that was written by the device.
Patch 2: adds concurrency protection for the err_threshold variable
to prevent race conditions between sysfs operations and hardware
error handling functions.
Patch 3: removes redundant error checks for curr_hw_sgl since
acc_get_sgl() cannot fail after mem_block creation, simplifying the
code.
Patch 4: adds a default case to a switch statement in
qm_vft_data_cfg to comply with coding style and prevent compiler
warnings.

nieweiqiang (4):
  crypto: hisilicon/qm - add concurrency protection for variable
    err_threshold
  crypto: hisilicon/qm - add missing default in switch in
    qm_vft_data_cfg
  crypto: hisilicon/qm - add the save operation of eqe and aeqe
  crypto: hisilicon/sgl - remove unnecessary checks for curr_hw_sgl
    error

 drivers/crypto/hisilicon/qm.c  | 41 ++++++++++++++++++++++------------
 drivers/crypto/hisilicon/sgl.c |  5 -----
 2 files changed, 27 insertions(+), 19 deletions(-)

-- 
2.33.0


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