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Message-ID: <rc4ydm2c3c4gqipaorr2ndrlwufay3ocfc2rq7llskkg7npe6x@53eztxy5v3gt>
Date: Sun, 26 Oct 2025 20:58:29 +0530
From: Manivannan Sadhasivam <mani@...nel.org>
To: Bjorn Helgaas <helgaas@...nel.org>
Cc: linux-pci@...r.kernel.org, 
	Manivannan Sadhasivam <manivannan.sadhasivam@....qualcomm.com>, Krzysztof Wilczyński <kwilczynski@...nel.org>, 
	Johan Hovold <johan@...nel.org>, Frank Li <Frank.li@....com>, 
	Shawn Lin <shawn.lin@...k-chips.com>, Rob Herring <robh@...nel.org>, 
	"David E . Box" <david.e.box@...ux.intel.com>, Kai-Heng Feng <kai.heng.feng@...onical.com>, 
	"Rafael J . Wysocki" <rafael@...nel.org>, Heiner Kallweit <hkallweit1@...il.com>, 
	Chia-Lin Kao <acelan.kao@...onical.com>, Gustavo Pimentel <Gustavo.Pimentel@...opsys.com>, 
	Han Jingoo <jingoohan1@...il.com>, Bjorn Andersson <andersson@...nel.org>, 
	Konrad Dybcio <konrad.dybcio@....qualcomm.com>, Bartosz Golaszewski <brgl@...ev.pl>, 
	linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org, 
	Bjorn Helgaas <bhelgaas@...gle.com>
Subject: Re: [PATCH] Revert "PCI: qcom: Remove custom ASPM enablement code"

On Fri, Oct 24, 2025 at 04:04:57PM -0500, Bjorn Helgaas wrote:
> From: Bjorn Helgaas <bhelgaas@...gle.com>
> 
> This reverts commit a729c16646198872e345bf6c48dbe540ad8a9753.
> 
> Prior to a729c1664619 ("PCI: qcom: Remove custom ASPM enablement code"),
> the qcom controller driver enabled ASPM, including L0s, L1, and L1 PM
> Substates, for all devices powered on at the time the controller driver
> enumerates them.
> 
> ASPM was *not* enabled for devices powered on later by pwrctrl (unless the
> kernel was built with PCIEASPM_POWERSAVE or PCIEASPM_POWER_SUPERSAVE, or
> the user enabled ASPM via module parameter or sysfs).
> 
> After f3ac2ff14834 ("PCI/ASPM: Enable all ClockPM and ASPM states for
> devicetree platforms"), the PCI core enabled all ASPM states for all
> devices whether powered on initially or by pwrctrl, so a729c1664619 was
> unnecessary and reverted.
> 
> But f3ac2ff14834 was too aggressive and broke platforms that didn't support
> CLKREQ# or required device-specific configuration for L1 Substates, so
> df5192d9bb0e ("PCI/ASPM: Enable only L0s and L1 for devicetree platforms")
> enabled only L0s and L1.
> 
> On Qualcomm platforms, this left L1 Substates disabled, which was a
> regression.  Revert a729c1664619 so L1 Substates will be enabled on devices
> that are initially powered on.  Devices powered on by pwrctrl will be
> addressed later.
> 

Can we rather have platform specific APIs [1] to enable ASPM states instead of just
re-introducing this half-baked solution? (yes, I introduced it, but it is still
imprefect).

I think we have learned by hard way that enabling ASPM by default can have
catastrophic effects for reasons we do not certainly know. So how about having
this platform specific API that enables individual platforms to enable the ASPM
states?

Sure, relying on the 'supports-clkreq' DT property will work for some platforms,
but this property is not widely used by all DT platforms (except Nvidia). For
instance, all our Qcom platforms support all ASPM states (except some known
platforms that do not support L0s due to incorrect PHY register settings) and we
do not set 'supports-clkreq' in DT. We can add them now, but old DTs which users
do not update will still suffer.

And we do not have a solution for VMD yet. So IMO, it is best to leave the ASPM
enablement to host controller drivers if they have the knowledge about it.

- Mani

[1] https://lore.kernel.org/linux-pci/20250825203542.3502368-1-david.e.box@linux.intel.com/

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