lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20251026221507.GI13023@pendragon.ideasonboard.com>
Date: Mon, 27 Oct 2025 00:15:07 +0200
From: Laurent Pinchart <laurent.pinchart@...asonboard.com>
To: Frank Li <Frank.li@....com>
Cc: Guoniu Zhou <guoniu.zhou@....nxp.com>,
	Mauro Carvalho Chehab <mchehab@...nel.org>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>, Shawn Guo <shawnguo@...nel.org>,
	Sascha Hauer <s.hauer@...gutronix.de>,
	Pengutronix Kernel Team <kernel@...gutronix.de>,
	Fabio Estevam <festevam@...il.com>, linux-media@...r.kernel.org,
	devicetree@...r.kernel.org, imx@...ts.linux.dev,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	Guoniu Zhou <guoniu.zhou@....com>
Subject: Re: [PATCH 3/3] media: nxp: imx8-isi: Add ISI support for i.MX95

On Fri, Oct 24, 2025 at 09:50:08AM -0400, Frank Li wrote:
> On Fri, Oct 24, 2025 at 05:46:54PM +0800, Guoniu Zhou wrote:
> > From: Guoniu Zhou <guoniu.zhou@....com>
> >
> > The ISI module on i.MX95 supports up to eight channels and four link
> > sources to obtain the image data for processing in its pipelines. It
> > can process up to eight image sources at the same time.
> >
> > In i.MX95, the gasket callbacks set ISI QoS which decide the priority
> > to access system memory when there are multiple masters access memory
> > simultaneously in camera domain.
> >
> > Signed-off-by: Guoniu Zhou <guoniu.zhou@....com>
> > ---
> >  .../media/platform/nxp/imx8-isi/imx8-isi-core.c    | 13 +++++++
> >  .../media/platform/nxp/imx8-isi/imx8-isi-core.h    |  2 +
> >  .../media/platform/nxp/imx8-isi/imx8-isi-gasket.c  | 44 ++++++++++++++++++++++
> >  3 files changed, 59 insertions(+)
> >
> > diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
> > index adc8d9960bf0df87d4e475661a3439beaf5ce9f6..ea9cc6d72bd4605000c6cbac2fa8cb9806e3cd3b 100644
> > --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
> > +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c
> > @@ -337,6 +337,18 @@ static const struct mxc_isi_plat_data mxc_imx93_data = {
> >  	.has_36bit_dma		= false,
> >  };
> >
> > +static const struct mxc_isi_plat_data mxc_imx95_data = {
> > +	.model			= MXC_ISI_IMX95,
> > +	.num_ports		= 4,
> > +	.num_channels		= 8,
> > +	.reg_offset		= 0x10000,
> > +	.ier_reg		= &mxc_imx8_isi_ier_v2,
> > +	.set_thd		= &mxc_imx8_isi_thd_v1,
> > +	.buf_active_reverse	= true,
> > +	.gasket_ops		= &mxc_imx95_gasket_ops,
> > +	.has_36bit_dma		= true,
> > +};
> > +
> >  static const struct mxc_isi_plat_data mxc_imx8qm_data = {
> >  	.model			= MXC_ISI_IMX8QM,
> >  	.num_ports		= 5,
> > @@ -548,6 +560,7 @@ static const struct of_device_id mxc_isi_of_match[] = {
> >  	{ .compatible = "fsl,imx8qxp-isi", .data = &mxc_imx8qxp_data },
> >  	{ .compatible = "fsl,imx8ulp-isi", .data = &mxc_imx8ulp_data },
> >  	{ .compatible = "fsl,imx93-isi", .data = &mxc_imx93_data },
> > +	{ .compatible = "fsl,imx95-isi", .data = &mxc_imx95_data },
> >  	{ /* sentinel */ },
> >  };
> >  MODULE_DEVICE_TABLE(of, mxc_isi_of_match);
> > diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
> > index e84af5127e4e7938e55e31b7063bee5e2cd4cb11..d1297ac26c56bdd97e4dd325b2a7394430a7adb9 100644
> > --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
> > +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h
> > @@ -161,6 +161,7 @@ enum model {
> >  	MXC_ISI_IMX8QXP,
> >  	MXC_ISI_IMX8ULP,
> >  	MXC_ISI_IMX93,
> > +	MXC_ISI_IMX95,
> >  };
> >
> >  struct mxc_isi_plat_data {
> > @@ -297,6 +298,7 @@ struct mxc_isi_dev {
> >
> >  extern const struct mxc_gasket_ops mxc_imx8_gasket_ops;
> >  extern const struct mxc_gasket_ops mxc_imx93_gasket_ops;
> > +extern const struct mxc_gasket_ops mxc_imx95_gasket_ops;
> >
> >  int mxc_isi_crossbar_init(struct mxc_isi_dev *isi);
> >  void mxc_isi_crossbar_cleanup(struct mxc_isi_crossbar *xbar);
> > diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-gasket.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-gasket.c
> > index f69c3b5d478209c083738477edf380e3f280c471..6418ee1aabdad3cb92e84f2ef6406c5503987401 100644
> > --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-gasket.c
> > +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-gasket.c
> > @@ -3,6 +3,7 @@
> >   * Copyright 2019-2023 NXP
> >   */
> >
> > +#include <linux/bits.h>
> >  #include <linux/regmap.h>
> >
> >  #include <media/mipi-csi2.h>
> > @@ -83,3 +84,46 @@ const struct mxc_gasket_ops mxc_imx93_gasket_ops = {
> >  	.enable = mxc_imx93_gasket_enable,
> >  	.disable = mxc_imx93_gasket_disable,
> >  };
> > +
> > +/* -----------------------------------------------------------------------------
> > + * i.MX95 gasket
> > + */
> > +#define ISI_QOS						0x10
> > +#define ISI_QOS_AWQOS(x)				FIELD_PREP(GENMASK(2, 0), (x))
> > +
> > +#define ISI_PANIC_QOS					0x14
> > +#define ISI_PANIC_QOS_HURRY_AWQOS(x)			FIELD_PREP(GENMASK(2, 0), (x))
> > +
> > +static void mxc_imx95_set_qos(struct mxc_isi_dev *isi, unsigned int val)
> > +{
> > +	/* Config QoS */
> > +	regmap_write(isi->gasket, ISI_QOS, ISI_QOS_AWQOS(val));
> > +
> > +	/* Config Panic QoS */
> > +	regmap_write(isi->gasket, ISI_PANIC_QOS, ISI_PANIC_QOS_HURRY_AWQOS(val));
> > +}
> > +
> > +static void mxc_imx95_clear_qos(struct mxc_isi_dev *isi)
> > +{
> > +	regmap_write(isi->gasket, ISI_QOS, 0x0);
> > +	regmap_write(isi->gasket, ISI_PANIC_QOS, 0x0);
> > +}
> > +
> > +static void mxc_imx95_gasket_enable(struct mxc_isi_dev *isi,
> > +				    const struct v4l2_mbus_frame_desc *fd,
> > +				    const struct v4l2_mbus_framefmt *fmt,
> > +				    const unsigned int port)
> > +{
> > +	mxc_imx95_set_qos(isi, 0x3);
> > +}
> 
> can we use standard interconnects standard interface to config Qos stuff.
> https://elixir.bootlin.com/linux/v6.17.4/source/include/linux/interconnect.h

Good suggestion, that would be my preference too. Otherwise we'll end up
hardcoding parameters here, which doesn't feel right. I assume the
values above would need to be tweaked based on use cases.

> > +
> > +static void mxc_imx95_gasket_disable(struct mxc_isi_dev *isi,
> > +				     unsigned int port)
> > +{
> > +	mxc_imx95_clear_qos(isi);
> > +}
> > +
> > +const struct mxc_gasket_ops mxc_imx95_gasket_ops = {
> > +	.enable = mxc_imx95_gasket_enable,
> > +	.disable = mxc_imx95_gasket_disable,
> > +};

-- 
Regards,

Laurent Pinchart

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ