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Message-ID: <176157228191.240954.997388702686594192.robh@kernel.org>
Date: Mon, 27 Oct 2025 08:38:04 -0500
From: "Rob Herring (Arm)" <robh@...nel.org>
To: Randolph Lin <randolph@...estech.com>
Cc: kwilczynski@...nel.org, aou@...s.berkeley.edu,
thippeswamy.havalige@....com, jingoohan1@...il.com,
palmer@...belt.com, linux-kernel@...r.kernel.org,
krzk+dt@...nel.org, randolph.sklin@...il.com, namcao@...utronix.de,
tim609@...estech.com, linux-riscv@...ts.infradead.org,
alex@...ti.fr, bhelgaas@...gle.com, lpieralisi@...nel.org,
shradha.t@...sung.com, conor+dt@...nel.org, ben717@...estech.com,
devicetree@...r.kernel.org, inochiama@...il.com,
linux-pci@...r.kernel.org, mani@...nel.org,
paul.walmsley@...ive.com, pjw@...nel.org
Subject: Re: [PATCH v9 1/4] dt-bindings: PCI: Add Andes QiLai PCIe support
On Thu, 23 Oct 2025 20:09:30 +0800, Randolph Lin wrote:
> Add the Andes QiLai PCIe node, which includes 3 Root Complexes.
> Only one example is required in the DTS bindings YAML file.
>
> Signed-off-by: Randolph Lin <randolph@...estech.com>
> ---
> .../bindings/pci/andestech,qilai-pcie.yaml | 86 +++++++++++++++++++
> 1 file changed, 86 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pci/andestech,qilai-pcie.yaml
>
Reviewed-by: Rob Herring (Arm) <robh@...nel.org>
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