linux-kernel - Re: [PATCH 0/2] Fix Agera PLL config of CAMCC for SM6350 & SM7150

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Message-ID: <176157405463.8818.13339628165200674226.b4-ty@kernel.org>
Date: Mon, 27 Oct 2025 09:09:11 -0500
From: Bjorn Andersson <andersson@...nel.org>
To: Michael Turquette <mturquette@...libre.com>,
	Stephen Boyd <sboyd@...nel.org>,
	Konrad Dybcio <konradybcio@...nel.org>,
	Danila Tikhonov <danila@...xyga.com>,
	Taniya Das <taniya.das@....qualcomm.com>,
	Luca Weiss <luca.weiss@...rphone.com>
Cc: ~postmarketos/upstreaming@...ts.sr.ht,
	phone-devel@...r.kernel.org,
	linux-arm-msm@...r.kernel.org,
	linux-clk@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH 0/2] Fix Agera PLL config of CAMCC for SM6350 & SM7150


On Tue, 21 Oct 2025 20:08:53 +0200, Luca Weiss wrote:
> On SM6350 I noticed that CAMCC_MCLK* refuses to turn on (being stuck on
> off). The cause seems that PLL2 (of type Agera) is not configured
> correctly due to the implementation in clk-alpha-pll.c differing between
> downstream (e.g. msm-4.19) and upstream, and therefore the USER_CTL
> value is not configured.
> 
> While looking around, it looks like camcc-sm7150.c has exactly the same
> issue, so fix that one as well.
> 
> [...]

Applied, thanks!

[1/2] clk: qcom: camcc-sm6350: Fix PLL config of PLL2
      commit: ab0e13141d679fdffdd3463a272c5c1b10be1794
[2/2] clk: qcom: camcc-sm7150: Fix PLL config of PLL2
      commit: 415aad75c7e5cdb72e0672dc1159be1a99535ecd

Best regards,
-- 
Bjorn Andersson <andersson@...nel.org>