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Message-ID: <20251027154615.115759-11-biju.das.jz@bp.renesas.com>
Date: Mon, 27 Oct 2025 15:45:57 +0000
From: Biju Das <biju.das.jz@...renesas.com>
To: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Jiri Slaby <jirislaby@...nel.org>
Cc: Biju Das <biju.das.jz@...renesas.com>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
Wolfram Sang <wsa+renesas@...g-engineering.com>,
Claudiu Beznea <claudiu.beznea.uj@...renesas.com>,
Nam Cao <namcao@...utronix.de>,
linux-kernel@...r.kernel.org,
linux-serial@...r.kernel.org,
Biju Das <biju.das.au@...il.com>,
linux-renesas-soc@...r.kernel.org
Subject: [PATCH 10/19] serial: sh-sci: Add RSCI_PORT_{SCI,SCIF} port IDs
RZ/G3E RSCI tx/rx supports both FIFO and non-FIFO mode. It has 32-stage
FIFO. Add RSCI_PORT_SCI port ID for non-FIFO mode and RSCI_PORT_SCIF port
ID for FIFO mode. Update the rx_trigger for both these modes.
Signed-off-by: Biju Das <biju.das.jz@...renesas.com>
---
drivers/tty/serial/sh-sci-common.h | 2 ++
drivers/tty/serial/sh-sci.c | 3 +++
2 files changed, 5 insertions(+)
diff --git a/drivers/tty/serial/sh-sci-common.h b/drivers/tty/serial/sh-sci-common.h
index bcdb41ddc15d..ef1d94ae8b5c 100644
--- a/drivers/tty/serial/sh-sci-common.h
+++ b/drivers/tty/serial/sh-sci-common.h
@@ -8,6 +8,8 @@
/* Private port IDs */
enum SCI_PORT_TYPE {
SCI_PORT_RSCI = BIT(7) | 0,
+ RSCI_PORT_SCI = BIT(7) | 1,
+ RSCI_PORT_SCIF = BIT(7) | 2,
};
enum SCI_CLKS {
diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index 4bcd886de75d..77ccf5677561 100644
--- a/drivers/tty/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
@@ -3153,6 +3153,9 @@ static int sci_init_single(struct platform_device *dev,
case SCI_PORT_RSCI:
sci_port->rx_trigger = 15;
break;
+ case RSCI_PORT_SCIF:
+ sci_port->rx_trigger = 32;
+ break;
default:
sci_port->rx_trigger = 1;
break;
--
2.43.0
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