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Message-ID: <176158269992.2601451.1416800166481248088.tip-bot2@tip-bot2>
Date: Mon, 27 Oct 2025 16:31:39 -0000
From: "tip-bot2 for Borislav Petkov (AMD)" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: "Borislav Petkov (AMD)" <bp@...en8.de>, x86@...nel.org,
linux-kernel@...r.kernel.org
Subject: [tip: x86/urgent] x86/microcode/AMD: Limit Entrysign signature
checking to known generations
The following commit has been merged into the x86/urgent branch of tip:
Commit-ID: 8a9fb5129e8e64d24543ebc70de941a2d77a9e77
Gitweb: https://git.kernel.org/tip/8a9fb5129e8e64d24543ebc70de941a2d77a9e77
Author: Borislav Petkov (AMD) <bp@...en8.de>
AuthorDate: Thu, 23 Oct 2025 14:46:29 +02:00
Committer: Borislav Petkov (AMD) <bp@...en8.de>
CommitterDate: Mon, 27 Oct 2025 17:07:17 +01:00
x86/microcode/AMD: Limit Entrysign signature checking to known generations
Limit Entrysign sha256 signature checking to CPUs in the range Zen1-Zen5.
X86_BUG cannot be used here because the loading on the BSP happens way
too early, before the cpufeatures machinery has been set up.
Signed-off-by: Borislav Petkov (AMD) <bp@...en8.de>
Link: https://patch.msgid.link/all/20251023124629.5385-1-bp@kernel.org
---
arch/x86/kernel/cpu/microcode/amd.c | 20 +++++++++++++++++++-
1 file changed, 19 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kernel/cpu/microcode/amd.c b/arch/x86/kernel/cpu/microcode/amd.c
index 28ed8c0..b7c797d 100644
--- a/arch/x86/kernel/cpu/microcode/amd.c
+++ b/arch/x86/kernel/cpu/microcode/amd.c
@@ -233,13 +233,31 @@ static bool need_sha_check(u32 cur_rev)
return true;
}
+static bool cpu_has_entrysign(void)
+{
+ unsigned int fam = x86_family(bsp_cpuid_1_eax);
+ unsigned int model = x86_model(bsp_cpuid_1_eax);
+
+ if (fam == 0x17 || fam == 0x19)
+ return true;
+
+ if (fam == 0x1a) {
+ if (model <= 0x2f ||
+ (0x40 <= model && model <= 0x4f) ||
+ (0x60 <= model && model <= 0x6f))
+ return true;
+ }
+
+ return false;
+}
+
static bool verify_sha256_digest(u32 patch_id, u32 cur_rev, const u8 *data, unsigned int len)
{
struct patch_digest *pd = NULL;
u8 digest[SHA256_DIGEST_SIZE];
int i;
- if (x86_family(bsp_cpuid_1_eax) < 0x17)
+ if (!cpu_has_entrysign())
return true;
if (!need_sha_check(cur_rev))
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