linux-kernel - Re: [PATCH v2 1/2] dt-bindings: hwmon: Add support for ST TSC1641 power monitor

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Message-ID: <112db7fd-3c0e-4c56-a553-5aca12965bdf@kernel.org>
Date: Mon, 27 Oct 2025 09:40:06 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Guenter Roeck <linux@...ck-us.net>,
 Igor Reznichenko <igor@...nichenko.net>
Cc: conor+dt@...nel.org, corbet@....net, david.hunter.linux@...il.com,
 devicetree@...r.kernel.org, krzk+dt@...nel.org, linux-doc@...r.kernel.org,
 linux-hwmon@...r.kernel.org, linux-kernel@...r.kernel.org, robh@...nel.org,
 skhan@...uxfoundation.org
Subject: Re: [PATCH v2 1/2] dt-bindings: hwmon: Add support for ST TSC1641
 power monitor

On 26/10/2025 20:58, Guenter Roeck wrote:
>>>>> +  reg:
>>>>> +    maxItems: 1
>>>>> +
>>>>> +  shunt-resistor-micro-ohms:
>>>>> +    description: Shunt resistor value in micro-ohms. Since device has internal
>>>>> +      16-bit RSHUNT register with 10 uOhm LSB, the maximum value is capped at
>>>>> +      655.35 mOhm.
>>>>> +    minimum: 100
>>>>> +    default: 1000
>>>>> +    maximum: 655350
>>>>> +
>>>>> +  st,alert-polarity-active-high:
>>>>
>>>> Isn't this just interrupt? You need proper interrupts property and then
>>>> its flag define the type of interrupt.
>>>
>>> This controls a bit written into device register.
>>> I omitted interrupt property after looking at existing power monitor bindings,
>>> especially hwmon/ti,ina2xx.yaml. INA226 has very similar bit controlling alert
>>> pin polarity and binding doesn't define alert pin as interrupt. Overall, I didn't
>>> find many power monitor bindings defining alert pins as interrupts.
>>
>>
>> On INA2xx that's SMBUS Alert. Is this the case here as well?
>>
> 
> It could be wired to SMBus alert, or it could be wired to a CPU interrupt pin.

So please explain me why CPU interrupt pin, which in every really every
device called "interrupts", would not be "interrupts" here? How CPU can
even guess the number of the interrupt in such case, without
"interrupts" property?

Best regards,
Krzysztof