linux-kernel - Re: [PATCH v2 1/8] reset: imx8mp-audiomix: Fix bad mask values

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Message-ID: <CAEnQRZDFkQ80TGvpCDRZgVtKF9oUVoKQsaAtyhYHWHAZsg0fHQ@mail.gmail.com>
Date: Mon, 27 Oct 2025 11:54:15 +0200
From: Daniel Baluta <daniel.baluta@...il.com>
To: Laurentiu Mihalcea <laurentiumihalcea111@...il.com>
Cc: Abel Vesa <abelvesa@...nel.org>, Peng Fan <peng.fan@....com>, 
	Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>, 
	Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Shawn Guo <shawnguo@...nel.org>, Fabio Estevam <festevam@...il.com>, 
	Philipp Zabel <p.zabel@...gutronix.de>, Daniel Baluta <daniel.baluta@....com>, 
	Shengjiu Wang <shengjiu.wang@....com>, linux-clk@...r.kernel.org, imx@...ts.linux.dev, 
	devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, 
	linux-kernel@...r.kernel.org, Pengutronix Kernel Team <kernel@...gutronix.de>
Subject: Re: [PATCH v2 1/8] reset: imx8mp-audiomix: Fix bad mask values

On Fri, Oct 17, 2025 at 2:22 PM Laurentiu Mihalcea
<laurentiumihalcea111@...il.com> wrote:
>
> From: Laurentiu Mihalcea <laurentiu.mihalcea@....com>
>
> As per the i.MX8MP TRM, section 14.2 "AUDIO_BLK_CTRL", table 14.2.3.1.1
> "memory map", the definition of the EARC control register shows that the
> EARC controller software reset is controlled via bit 0, while the EARC PHY
> software reset is controlled via bit 1.
>
> This means that the current definitions of IMX8MP_AUDIOMIX_EARC_RESET_MASK
> and IMX8MP_AUDIOMIX_EARC_PHY_RESET_MASK are wrong since their values would
> imply that the EARC controller software reset is controlled via bit 1 and
> the EARC PHY software reset is controlled via bit 2. Fix them.
>
> Fixes: a83bc87cd30a ("reset: imx8mp-audiomix: Prepare the code for more reset bits")
> Cc: stable@...r.kernel.org
> Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@....com>

Reviewed-by: Daniel Baluta <daniel.baluta@....com>