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Message-ID: <20251028133151.1487327-11-cosmin-gabriel.tanislav.xa@renesas.com>
Date: Tue, 28 Oct 2025 15:31:41 +0200
From: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@...esas.com>
To:
Cc: Fabrizio Castro <fabrizio.castro.jz@...esas.com>,
Mark Brown <broonie@...nel.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Magnus Damm <magnus.damm@...il.com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Philipp Zabel <p.zabel@...gutronix.de>,
linux-spi@...r.kernel.org,
linux-renesas-soc@...r.kernel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
linux-clk@...r.kernel.org,
Cosmin Tanislav <cosmin-gabriel.tanislav.xa@...esas.com>
Subject: [PATCH 10/14] spi: rzv2h-rspi: add support for loopback mode
Add support for loopback mode for debugging purposes, allowing us to
test the SPI controller at the maximum SPI transfer clock without being
limited by external wiring.
Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@...esas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro.jz@...esas.com>
---
drivers/spi/spi-rzv2h-rspi.c | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/spi-rzv2h-rspi.c b/drivers/spi/spi-rzv2h-rspi.c
index 9bd350e1f1fa..70239fb1c03a 100644
--- a/drivers/spi/spi-rzv2h-rspi.c
+++ b/drivers/spi/spi-rzv2h-rspi.c
@@ -24,6 +24,7 @@
/* Registers */
#define RSPI_SPDR 0x00
#define RSPI_SPCR 0x08
+#define RSPI_SPPCR 0x0e
#define RSPI_SSLP 0x10
#define RSPI_SPBR 0x11
#define RSPI_SPSCR 0x13
@@ -40,6 +41,9 @@
#define RSPI_SPCR_SCKASE BIT(12)
#define RSPI_SPCR_SPE BIT(0)
+/* Register SPPCR */
+#define RSPI_SPPCR_SPLP2 BIT(1)
+
/* Register SPBR */
#define RSPI_SPBR_SPR_MIN 0
#define RSPI_SPBR_SPR_PCLK_MIN 1
@@ -345,6 +349,7 @@ static int rzv2h_rspi_prepare_message(struct spi_controller *ctlr,
u8 bits_per_word;
u32 conf32;
u16 conf16;
+ u8 conf8;
/* Make sure SPCR.SPE is 0 before amending the configuration */
rzv2h_rspi_spe_disable(rspi);
@@ -389,6 +394,10 @@ static int rzv2h_rspi_prepare_message(struct spi_controller *ctlr,
/* Use SPCMD0 only */
writeb(0x0, rspi->base + RSPI_SPSCR);
+ /* Setup loopback */
+ conf8 = FIELD_PREP(RSPI_SPPCR_SPLP2, !!(spi->mode & SPI_LOOP));
+ writeb(conf8, rspi->base + RSPI_SPPCR);
+
/* Setup mode */
conf32 = FIELD_PREP(RSPI_SPCMD_CPOL, !!(spi->mode & SPI_CPOL));
conf32 |= FIELD_PREP(RSPI_SPCMD_CPHA, !!(spi->mode & SPI_CPHA));
@@ -490,7 +499,7 @@ static int rzv2h_rspi_probe(struct platform_device *pdev)
}
controller->mode_bits = SPI_CPHA | SPI_CPOL | SPI_CS_HIGH |
- SPI_LSB_FIRST;
+ SPI_LSB_FIRST | SPI_LOOP;
controller->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32);
controller->prepare_message = rzv2h_rspi_prepare_message;
controller->unprepare_message = rzv2h_rspi_unprepare_message;
--
2.51.1
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