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Message-Id: <20251028-sy7636-rsrc-v4-1-242ccfd3bc10@kernel.org>
Date: Tue, 28 Oct 2025 16:00:36 +0100
From: Andreas Kemnade <akemnade@...nel.org>
To: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Alistair Francis <alistair@...stair23.me>,
Liam Girdwood <lgirdwood@...il.com>, Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>, Frank Li <Frank.li@....com>
Cc: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
imx@...ts.linux.dev, linux-arm-kernel@...ts.infradead.org,
Peng Fan <peng.fan@....com>, Andreas Kemnade <akemnade@...nel.org>
Subject: [PATCH v4] ARM: dts: imx: e70k02: add sy7636
Add the EPD PMIC for the e70k02 based devices as a step towards full EPD
support.
Acked-by: Alistair Francis <alistair@...stair23.me>
Reviewed-by: Peng Fan <peng.fan@....com>
Signed-off-by: Andreas Kemnade <akemnade@...nel.org>
---
The SY7636A has some pins which can be hardwired or used to have more
more advanced power management available. As several devices containing
this regulator have these pins not hardwired, but instead connected to some
GPIO, enhance the driver to have them defined and initialized.
Also add the ability to power off the chip completely by defining some
input power supply.
Actually implementing better power management is planned to be
implemented as a second step. The regulators in the SY7636A should only
be on for a short time during display refresh, but currently they are
unconditionally forcefully enabled by the hwmon part of this chip.
---
Changes in v4:
- reorder enable-active-high property
- Link to v3: https://lore.kernel.org/r/20250917-sy7636-rsrc-v3-0-331237d507a2@kernel.org
Changes in v3:
- shorten descriptions in binding
- Link to v2: https://lore.kernel.org/r/20250909-sy7636-rsrc-v2-0-cfd9f44fd259@kernel.org
Changes in v2:
- en[-gpios] -> enable[-gpios] in yaml/dts/driver
- fix en vs vcom_en in error handling
- comment delay
- drop applied commit (rebased to regulator/for-linus)
- Link to v1: https://lore.kernel.org/r/20250906-sy7636-rsrc-v1-0-e2886a9763a7@kernel.org
---
arch/arm/boot/dts/nxp/imx/e70k02.dtsi | 25 +++++++++++++++++++++-
.../arm/boot/dts/nxp/imx/imx6sl-tolino-vision5.dts | 24 +++++++++++++++++++++
.../arm/boot/dts/nxp/imx/imx6sll-kobo-librah2o.dts | 24 +++++++++++++++++++++
3 files changed, 72 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/nxp/imx/e70k02.dtsi b/arch/arm/boot/dts/nxp/imx/e70k02.dtsi
index dcc3c9d488a8..3bb11c5a6353 100644
--- a/arch/arm/boot/dts/nxp/imx/e70k02.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/e70k02.dtsi
@@ -69,6 +69,14 @@ memory@...00000 {
reg = <0x80000000 0x20000000>;
};
+ epd_pmic_supply: regulator-epd-pmic-in {
+ compatible = "regulator-fixed";
+ regulator-name = "epd_pmic_supply";
+ gpio = <&gpio2 14 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ startup-delay-us = <20000>;
+ };
+
reg_wifi: regulator-wifi {
compatible = "regulator-fixed";
regulator-name = "SD3_SPWR";
@@ -133,7 +141,22 @@ touchscreen@24 {
vdd-supply = <&ldo5_reg>;
};
- /* TODO: SY7636 PMIC for E Ink at 0x62 */
+ sy7636: pmic@62 {
+ compatible = "silergy,sy7636a";
+ reg = <0x62>;
+ enable-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
+ vcom-en-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
+ epd-pwr-good-gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>;
+ vin-supply = <&epd_pmic_supply>;
+
+ #thermal-sensor-cells = <0>;
+
+ regulators {
+ reg_epdpmic: vcom {
+ regulator-name = "vcom";
+ };
+ };
+ };
};
diff --git a/arch/arm/boot/dts/nxp/imx/imx6sl-tolino-vision5.dts b/arch/arm/boot/dts/nxp/imx/imx6sl-tolino-vision5.dts
index a2534c422a52..f8709a952409 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6sl-tolino-vision5.dts
+++ b/arch/arm/boot/dts/nxp/imx/imx6sl-tolino-vision5.dts
@@ -26,6 +26,11 @@ / {
compatible = "kobo,tolino-vision5", "fsl,imx6sl";
};
+&epd_pmic_supply {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_epd_pmic_supply>;
+};
+
&gpio_keys {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_keys>;
@@ -59,6 +64,12 @@ MX6SL_PAD_FEC_RXD1__GPIO4_IO18 0x10059 /* TP_RST */
>;
};
+ pinctrl_epd_pmic_supply: epd-pmic-supplygrp {
+ fsl,pins = <
+ MX6SL_PAD_EPDC_PWRWAKEUP__GPIO2_IO14 0x40010059
+ >;
+ };
+
pinctrl_gpio_keys: gpio-keysgrp {
fsl,pins = <
MX6SL_PAD_FEC_CRS_DV__GPIO4_IO25 0x17059 /* PWR_SW */
@@ -159,6 +170,14 @@ MX6SL_PAD_KEY_COL2__GPIO3_IO28 0x1b8b1 /* ricoh619 bat_low_int */
>;
};
+ pinctrl_sy7636_gpio: sy7636-gpiogrp {
+ fsl,pins = <
+ MX6SL_PAD_EPDC_VCOM0__GPIO2_IO03 0x40010059 /* VCOM_CTRL */
+ MX6SL_PAD_EPDC_PWRCTRL1__GPIO2_IO08 0x40010059 /* EN */
+ MX6SL_PAD_EPDC_PWRSTAT__GPIO2_IO13 0x17059 /* PWR_GOOD */
+ >;
+ };
+
pinctrl_uart1: uart1grp {
fsl,pins = <
MX6SL_PAD_UART1_TXD__UART1_TX_DATA 0x1b0b1
@@ -329,6 +348,11 @@ &ricoh619 {
pinctrl-0 = <&pinctrl_ricoh_gpio>;
};
+&sy7636 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sy7636_gpio>;
+};
+
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
diff --git a/arch/arm/boot/dts/nxp/imx/imx6sll-kobo-librah2o.dts b/arch/arm/boot/dts/nxp/imx/imx6sll-kobo-librah2o.dts
index 660620d226f7..19bbe60331b3 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6sll-kobo-librah2o.dts
+++ b/arch/arm/boot/dts/nxp/imx/imx6sll-kobo-librah2o.dts
@@ -36,6 +36,11 @@ &cpu0 {
soc-supply = <&dcdc1_reg>;
};
+&epd_pmic_supply {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_epd_pmic_supply>;
+};
+
&gpio_keys {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_keys>;
@@ -69,6 +74,12 @@ MX6SLL_PAD_GPIO4_IO18__GPIO4_IO18 0x10059 /* TP_RST */
>;
};
+ pinctrl_epd_pmic_supply: epd-pmic-supplygrp {
+ fsl,pins = <
+ MX6SLL_PAD_EPDC_PWR_WAKE__GPIO2_IO14 0x40010059
+ >;
+ };
+
pinctrl_gpio_keys: gpio-keysgrp {
fsl,pins = <
MX6SLL_PAD_GPIO4_IO25__GPIO4_IO25 0x17059 /* PWR_SW */
@@ -169,6 +180,14 @@ MX6SLL_PAD_KEY_COL2__GPIO3_IO28 0x1b8b1 /* ricoh619 bat_low_int */
>;
};
+ pinctrl_sy7636_gpio: sy7636-gpiogrp {
+ fsl,pins = <
+ MX6SLL_PAD_EPDC_VCOM0__GPIO2_IO03 0x40010059 /* VCOM_CTRL */
+ MX6SLL_PAD_EPDC_PWR_CTRL1__GPIO2_IO08 0x40010059 /* EN */
+ MX6SLL_PAD_EPDC_PWR_STAT__GPIO2_IO13 0x17059 /* PWR_GOOD */
+ >;
+ };
+
pinctrl_uart1: uart1grp {
fsl,pins = <
MX6SLL_PAD_UART1_TXD__UART1_DCE_TX 0x1b0b1
@@ -319,6 +338,11 @@ &ricoh619 {
pinctrl-0 = <&pinctrl_ricoh_gpio>;
};
+&sy7636 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sy7636_gpio>;
+};
+
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
---
base-commit: f7d2388eeec24966fc4d5cf32d706f0514f29ac5
change-id: 20250906-sy7636-rsrc-c20aa6baa2c4
Best regards,
--
Andreas Kemnade <akemnade@...nel.org>
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