| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <20251028000959.3kiac5kwo5pcl4ft@skbuf>
Date: Tue, 28 Oct 2025 02:09:59 +0200
From: Vladimir Oltean <olteanv@...il.com>
To: Daniel Golle <daniel@...rotopia.org>
Cc: Hauke Mehrtens <hauke@...ke-m.de>, Andrew Lunn <andrew@...n.ch>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Simon Horman <horms@...nel.org>,
Russell King <linux@...linux.org.uk>, netdev@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Andreas Schirm <andreas.schirm@...mens.com>,
Lukas Stockmann <lukas.stockmann@...mens.com>,
Alexander Sverdlin <alexander.sverdlin@...mens.com>,
Peter Christen <peter.christen@...mens.com>,
Avinash Jayaraman <ajayaraman@...linear.com>,
Bing tao Xu <bxu@...linear.com>, Liang Xu <lxu@...linear.com>,
Juraj Povazanec <jpovazanec@...linear.com>,
"Fanni (Fang-Yi) Chan" <fchan@...linear.com>,
"Benny (Ying-Tsan) Weng" <yweng@...linear.com>,
"Livia M. Rosu" <lrosu@...linear.com>,
John Crispin <john@...ozen.org>
Subject: Re: [PATCH net-next v3 10/12] dt-bindings: net: dsa: lantiq,gswip:
add support for MaxLinear GSW1xx switches
On Sun, Oct 26, 2025 at 11:48:06PM +0000, Daniel Golle wrote:
> Extend the Lantiq GSWIP device tree binding to also cover MaxLinear
> GSW1xx switches which are based on the same hardware IP but connected
> via MDIO instead of being memory-mapped.
>
> Add compatible strings for MaxLinear GSW120, GSW125, GSW140, GSW141,
> and GSW145 switches and adjust the schema to handle the different
> connection methods with conditional properties.
>
> Add MaxLinear GSW125 example showing MDIO-connected configuration.
>
> Signed-off-by: Daniel Golle <daniel@...rotopia.org>
> ---
> v3:
> * add maxlinear,rx-inverted and maxlinear,tx-inverted properties
>
> v2:
> * remove git conflict left-overs which somehow creeped in
> * indent example with 4 spaces instead of tabs
>
> .../bindings/net/dsa/lantiq,gswip.yaml | 275 +++++++++++++-----
> 1 file changed, 202 insertions(+), 73 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/net/dsa/lantiq,gswip.yaml b/Documentation/devicetree/bindings/net/dsa/lantiq,gswip.yaml
> index dd3858bad8ca..1148fdd0b6bc 100644
> --- a/Documentation/devicetree/bindings/net/dsa/lantiq,gswip.yaml
> +++ b/Documentation/devicetree/bindings/net/dsa/lantiq,gswip.yaml
> @@ -4,7 +4,12 @@
> $id: http://devicetree.org/schemas/net/dsa/lantiq,gswip.yaml#
> $schema: http://devicetree.org/meta-schemas/core.yaml#
>
> -title: Lantiq GSWIP Ethernet switches
> +title: Lantiq GSWIP and MaxLinear GSW1xx Ethernet switches
> +
> +description:
> + Lantiq GSWIP and MaxLinear GSW1xx switches share the same hardware IP.
> + Lantiq switches are embedded in SoCs and accessed via memory-mapped I/O,
> + while MaxLinear switches are standalone ICs connected via MDIO.
>
> $ref: dsa.yaml#
>
> @@ -34,6 +39,108 @@ patternProperties:
> description:
> Configure the RMII reference clock to be a clock output
> rather than an input. Only applicable for RMII mode.
> + maxlinear,rx-inverted:
> + type: boolean
> + description:
> + Enable RX polarity inversion for SerDes port.
> + maxlinear,tx-inverted:
> + type: boolean
> + description:
> + Enable TX polarity inversion for SerDes port.
How urgently do you need these two properties? They are truly general,
not vendor-specific, and while I wanted to add such support to the
Synopsys XPCS, I started working on some generic variants.
There's some cleanup and consolidation to do. "st,pcie-tx-pol-inv" and
"st,sata-tx-pol-inv" are defined in .txt bindings but not implemented.
Then we have "st,px_rx_pol_inv" and "mediatek,pnswap" which would also
need deprecating and converted to the new formats.
Where I left things was that I haven't decided if there's any value in
defining the polarity per SerDes protocol (like
Documentation/devicetree/bindings/phy/transmit-amplitude.yaml) or if a
global value is fine. I.e. if the polarity is inverted for SATA, it's
normal for PCIe, or something like that. The existence of the independent
"st,pcie-tx-pol-inv" and "st,sata-tx-pol-inv" properties would suggest
yes, but the lack of an implementation casts some doubt on that.
Anyway, I do have some prototype patches that add something like this:
phy: phy {
#phy-cells = <1>;
tx-p2p-microvolt = <915000>, <1100000>, <1200000>;
tx-p2p-microvolt-names = "2500base-x", "usb-hs", "usb-ss";
/* RX polarity is inverted for usb-hs, normal for usb-ss */
rx-polarity = <PHY_POL_INVERT>, <PHY_POL_NORMAL>;
rx-polarity-names = "usb-hs", "usb-ss";
/* TX polarity is normal for all modes */
tx-polarity = <PHY_POL_NORMAL>;
tx-polarity-names = "default";
};
and a new drivers/phy/phy-common-props.c file (yes, outside of netdev)
with two exported API functions:
int phy_get_rx_polarity(struct fwnode_handle *fwnode, const char *mode_name);
int phy_get_tx_polarity(struct fwnode_handle *fwnode, const char *mode_name);
If you can split this up from the rest of the MDIO discrete switch
introduction series, I can accelerate work on these common properties in
the following weeks.
> +
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - lantiq,xrx200-gswip
> + - lantiq,xrx300-gswip
> + - lantiq,xrx330-gswip
> + then:
> + properties:
> + reg:
> + minItems: 3
> + maxItems: 3
> + description: Memory-mapped register regions (switch, mdio, mii)
> + reg-names:
> + items:
> + - const: switch
> + - const: mdio
> + - const: mii
> + mdio:
> + $ref: /schemas/net/mdio.yaml#
> + unevaluatedProperties: false
> +
> + properties:
> + compatible:
> + const: lantiq,xrx200-mdio
> +
> + required:
> + - compatible
> + gphy-fw:
> + type: object
> + properties:
> + '#address-cells':
> + const: 1
> +
> + '#size-cells':
> + const: 0
> +
> + compatible:
> + items:
> + - enum:
> + - lantiq,xrx200-gphy-fw
> + - lantiq,xrx300-gphy-fw
> + - lantiq,xrx330-gphy-fw
> + - const: lantiq,gphy-fw
> +
> + lantiq,rcu:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description: phandle to the RCU syscon
> +
> + patternProperties:
> + "^gphy@[0-9a-f]{1,2}$":
> + type: object
> +
> + additionalProperties: false
> +
> + properties:
> + reg:
> + minimum: 0
> + maximum: 255
> + description:
> + Offset of the GPHY firmware register in the RCU register
> + range
> +
> + resets:
> + items:
> + - description: GPHY reset line
> +
> + reset-names:
> + items:
> + - const: gphy
> +
> + required:
> + - reg
> +
> + required:
> + - compatible
> + - lantiq,rcu
> +
> + additionalProperties: false
> + required:
> + - reg-names
> + else:
> + properties:
> + reg:
> + maxItems: 1
> + description: MDIO bus address
> + reg-names: false
> + gphy-fw: false
If they're so different you could also define a separate schema for the
discrete switches, if that helps.
> + mdio:
> + $ref: /schemas/net/mdio.yaml#
> + unevaluatedProperties: false
>
> maintainers:
> - Hauke Mehrtens <hauke@...ke-m.de>
> @@ -44,78 +151,11 @@ properties:
> - lantiq,xrx200-gswip
> - lantiq,xrx300-gswip
> - lantiq,xrx330-gswip
> -
> - reg:
> - minItems: 3
> - maxItems: 3
> -
> - reg-names:
> - items:
> - - const: switch
> - - const: mdio
> - - const: mii
> -
> - mdio:
> - $ref: /schemas/net/mdio.yaml#
> - unevaluatedProperties: false
> -
> - properties:
> - compatible:
> - const: lantiq,xrx200-mdio
> -
> - required:
> - - compatible
> -
> - gphy-fw:
> - type: object
> - properties:
> - '#address-cells':
> - const: 1
> -
> - '#size-cells':
> - const: 0
> -
> - compatible:
> - items:
> - - enum:
> - - lantiq,xrx200-gphy-fw
> - - lantiq,xrx300-gphy-fw
> - - lantiq,xrx330-gphy-fw
> - - const: lantiq,gphy-fw
> -
> - lantiq,rcu:
> - $ref: /schemas/types.yaml#/definitions/phandle
> - description: phandle to the RCU syscon
> -
> - patternProperties:
> - "^gphy@[0-9a-f]{1,2}$":
> - type: object
> -
> - additionalProperties: false
> -
> - properties:
> - reg:
> - minimum: 0
> - maximum: 255
> - description:
> - Offset of the GPHY firmware register in the RCU register range
> -
> - resets:
> - items:
> - - description: GPHY reset line
> -
> - reset-names:
> - items:
> - - const: gphy
> -
> - required:
> - - reg
> -
> - required:
> - - compatible
> - - lantiq,rcu
> -
> - additionalProperties: false
> + - maxlinear,gsw120
> + - maxlinear,gsw125
> + - maxlinear,gsw140
> + - maxlinear,gsw141
> + - maxlinear,gsw145
>
> required:
> - compatible
> @@ -130,6 +170,7 @@ examples:
> reg = <0xe108000 0x3100>, /* switch */
> <0xe10b100 0xd8>, /* mdio */
> <0xe10b1d8 0x130>; /* mii */
> + reg-names = "switch", "mdio", "mii";
> dsa,member = <0 0>;
>
> ports {
> @@ -228,3 +269,91 @@ examples:
> };
> };
> };
> +
> + - |
> + #include <dt-bindings/leds/common.h>
> +
> + mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + switch@1f {
> + compatible = "maxlinear,gsw125";
> + reg = <0x1f>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + label = "lan0";
> + phy-handle = <&switchphy0>;
> + phy-mode = "internal";
> + };
> +
> + port@1 {
> + reg = <1>;
> + label = "lan1";
> + phy-handle = <&switchphy1>;
> + phy-mode = "internal";
> + };
> +
> + port@4 {
> + reg = <4>;
> + label = "wan";
> + phy-mode = "1000base-x";
> + maxlinear,rx-inverted;
> + managed = "in-band-status";
> + };
> +
> + port@5 {
> + reg = <5>;
> + phy-mode = "rgmii-id";
> + tx-internal-delay-ps = <2000>;
> + rx-internal-delay-ps = <2000>;
> + ethernet = <ð0>;
> +
> + fixed-link {
> + speed = <1000>;
> + full-duplex;
> + };
> + };
> + };
> +
> + mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + switchphy0: switchphy@0 {
> + reg = <0>;
> +
> + leds {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + led@0 {
> + reg = <0>;
> + color = <LED_COLOR_ID_GREEN>;
> + function = LED_FUNCTION_LAN;
> + };
> + };
> + };
> +
> + switchphy1: switchphy@1 {
> + reg = <1>;
> +
> + leds {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + led@0 {
> + reg = <0>;
> + color = <LED_COLOR_ID_GREEN>;
> + function = LED_FUNCTION_LAN;
> + };
> + };
> + };
> + };
> + };
> + };
> --
> 2.51.1
Powered by blists - more mailing lists