linux-kernel - Re: [PATCH v5 07/10] phy: qualcomm: qmp-combo: Update QMP PHY with Glymur settings

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Message-ID: <7pc3m2pzp3hzogg5ygorsmv2dy5vw2xiebppcbx7tzp4jnhuom@epgtkjpniyrs>
Date: Tue, 28 Oct 2025 23:10:31 +0200
From: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
To: Wesley Cheng <wesley.cheng@....qualcomm.com>
Cc: Abel Vesa <abel.vesa@...aro.org>, krzk+dt@...nel.org, conor+dt@...nel.org,
        konrad.dybcio@....qualcomm.com, kishon@...nel.org, vkoul@...nel.org,
        gregkh@...uxfoundation.org, robh@...nel.org,
        linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org,
        linux-usb@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v5 07/10] phy: qualcomm: qmp-combo: Update QMP PHY with
 Glymur settings

On Fri, Oct 24, 2025 at 05:41:18PM -0700, Wesley Cheng wrote:
> 
> 
> On 10/24/2025 5:02 PM, Wesley Cheng wrote:
> > 
> > 
> > On 10/24/2025 3:04 AM, Abel Vesa wrote:
> > > On 25-10-06 15:19:59, Wesley Cheng wrote:
> > > > For SuperSpeed USB to work properly, there is a set of HW settings that
> > > > need to be programmed into the USB blocks within the QMP PHY. 
> > > > Ensure that
> > > > these settings follow the latest settings mentioned in the HW
> > > > programming
> > > > guide.  The QMP USB PHY on Glymur is a USB43 based PHY that will
> > > > have some
> > > > new ways to define certain registers, such as the replacement of TXA/RXA
> > > > and TXB/RXB register sets.  This was replaced with the LALB
> > > > register set.
> > > > 
> > > > There are also some PHY init updates to modify the PCS MISC
> > > > register space.
> > > > Without these, the QMP PHY PLL locking fails.
> > > > 
> > > > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
> > > > Signed-off-by: Wesley Cheng <wesley.cheng@....qualcomm.com>
> > > > ---
> > > >   drivers/phy/qualcomm/phy-qcom-qmp-combo.c     | 314 ++++++++-
> > > >   .../phy/qualcomm/phy-qcom-qmp-pcs-aon-v8.h    |  17 +
> > > >   .../phy/qualcomm/phy-qcom-qmp-pcs-misc-v8.h   |  12 +
> > > >   .../qualcomm/phy-qcom-qmp-qserdes-lalb-v8.h   | 639 ++++++++++++++++++
> > > >   .../phy/qualcomm/phy-qcom-qmp-usb43-pcs-v8.h  |  33 +
> > > >   .../phy-qcom-qmp-usb43-qserdes-com-v8.h       | 224 ++++++
> > > >   drivers/phy/qualcomm/phy-qcom-qmp.h           |   2 +
> > > >   7 files changed, 1240 insertions(+), 1 deletion(-)
> > > >   create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-aon-v8.h
> > > >   create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-misc-v8.h
> > > >   create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-qserdes-lalb-v8.h
> > > >   create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-usb43-pcs-v8.h
> > > >   create mode 100644
> > > > drivers/phy/qualcomm/phy-qcom-qmp-usb43-qserdes-com-v8.h
> > > > 
> > > > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> > > > b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> > > > index 1caa1fb6a8c7..8216820e388f 100644
> > > > --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> > > > +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> > > 
> > > [...]
> > > 
> > > > +static const struct qmp_phy_cfg glymur_usb3dpphy_cfg = {
> > > > +    .offsets        = &qmp_combo_usb43dp_offsets_v8,
> > > > +
> > > > +    .serdes_tbl        = glymur_usb43dp_serdes_tbl,
> > > > +    .serdes_tbl_num        = ARRAY_SIZE(glymur_usb43dp_serdes_tbl),
> > > > +    .tx_tbl            = glymur_usb43dp_lalb_tbl,
> > > > +    .tx_tbl_num        = ARRAY_SIZE(glymur_usb43dp_lalb_tbl),
> > > > +    .pcs_tbl        = glymur_usb43dp_pcs_tbl,
> > > > +    .pcs_tbl_num        = ARRAY_SIZE(glymur_usb43dp_pcs_tbl),
> > > > +    .pcs_usb_tbl        = glymur_usb43dp_pcs_usb_tbl,
> > > > +    .pcs_usb_tbl_num    = ARRAY_SIZE(glymur_usb43dp_pcs_usb_tbl),
> > > > +    .pcs_misc_tbl        = glymur_usb43dp_pcs_misc_tbl,
> > > > +    .pcs_misc_tbl_num    = ARRAY_SIZE(glymur_usb43dp_pcs_misc_tbl),
> > > > +
> > > > +    .dp_serdes_tbl        = qmp_v6_n4_dp_serdes_tbl,
> > > > +    .dp_serdes_tbl_num    = ARRAY_SIZE(qmp_v6_n4_dp_serdes_tbl),
> > > > +    .dp_tx_tbl        = qmp_v6_n4_dp_tx_tbl,
> > > > +    .dp_tx_tbl_num        = ARRAY_SIZE(qmp_v6_n4_dp_tx_tbl),
> > > > +
> > > > +    .serdes_tbl_rbr        = qmp_v6_n4_dp_serdes_tbl_rbr,
> > > > +    .serdes_tbl_rbr_num    = ARRAY_SIZE(qmp_v6_n4_dp_serdes_tbl_rbr),
> > > > +    .serdes_tbl_hbr        = qmp_v6_n4_dp_serdes_tbl_hbr,
> > > > +    .serdes_tbl_hbr_num    = ARRAY_SIZE(qmp_v6_n4_dp_serdes_tbl_hbr),
> > > > +    .serdes_tbl_hbr2    = qmp_v6_n4_dp_serdes_tbl_hbr2,
> > > > +    .serdes_tbl_hbr2_num    = ARRAY_SIZE(qmp_v6_n4_dp_serdes_tbl_hbr2),
> > > > +    .serdes_tbl_hbr3    = qmp_v6_n4_dp_serdes_tbl_hbr3,
> > > > +    .serdes_tbl_hbr3_num    = ARRAY_SIZE(qmp_v6_n4_dp_serdes_tbl_hbr3),
> > > > +
> > > > +    .swing_hbr_rbr        = &qmp_dp_v6_voltage_swing_hbr_rbr,
> > > > +    .pre_emphasis_hbr_rbr    = &qmp_dp_v6_pre_emphasis_hbr_rbr,
> > > > +    .swing_hbr3_hbr2    = &qmp_dp_v5_voltage_swing_hbr3_hbr2,
> > > > +    .pre_emphasis_hbr3_hbr2    = &qmp_dp_v5_pre_emphasis_hbr3_hbr2,
> > > > +
> > > > +    .dp_aux_init        = qmp_v4_dp_aux_init,
> > > > +    .configure_dp_tx    = qmp_v4_configure_dp_tx,
> > > > +    .configure_dp_phy    = qmp_v4_configure_dp_phy,
> > > > +    .calibrate_dp_phy    = qmp_v4_calibrate_dp_phy,
> > > 
> > > So I see you are adding the DP related config here as well, but it is
> > > definitely not compatible with v6 N4. I'm assyuming you picked v6 N4
> > > as a default
> > > just to allow the USB part work for now, right ?
> > > 
> > > I don't suppose we can drop the DP related config from this patch and
> > > still have the USB part working, right?
> > > 
> > > Otherwise, we need to mention the fact that even though the DP part
> > > is also being added, it is broken.
> > 
> > Hi Abel,
> > 
> > That is correct.  Without these defined, the USB path won't work, and
> > we'll need to supplement this if we wanted to add DP support.  Hence,
> > why I didn't add any mention of DP altmode in the commit text.  I can
> > clarify that we added DP placeholders if that makes it more clear in the
> > commit text.
> > 
> 
> Hi Abel,
> 
> I take that back...I went back and reviewed the QMP combo driver again, and
> gave it a try w/o any of the DP init tables.  SS USB is working fine.  I
> will update the patch to remove the DP entries.  Thanks for catching this.

Please provide a proper programming for DP part instead. I don't see a
reason to provide only partial support for the device.

-- 
With best wishes
Dmitry