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Message-Id: <20251028213351.77368-3-apokusinski01@gmail.com>
Date: Tue, 28 Oct 2025 22:33:52 +0100
From: Antoni Pokusinski <apokusinski01@...il.com>
To: jic23@...nel.org,
dlechner@...libre.com,
nuno.sa@...log.com,
andy@...nel.org,
marcelo.schmitt1@...il.com
Cc: linux-iio@...r.kernel.org,
linux-kernel@...r.kernel.org,
Antoni Pokusinski <apokusinski01@...il.com>
Subject: [PATCH 2/2] iio: mpl3115: add threshold events support
Add support for pressure and temperature rising threshold events.
Signed-off-by: Antoni Pokusinski <apokusinski01@...il.com>
---
drivers/iio/pressure/mpl3115.c | 219 +++++++++++++++++++++++++++++++--
1 file changed, 210 insertions(+), 9 deletions(-)
diff --git a/drivers/iio/pressure/mpl3115.c b/drivers/iio/pressure/mpl3115.c
index 4cc103e20a39..bb252ff05ff5 100644
--- a/drivers/iio/pressure/mpl3115.c
+++ b/drivers/iio/pressure/mpl3115.c
@@ -16,8 +16,10 @@
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/property.h>
+#include <linux/units.h>
#include <linux/iio/buffer.h>
+#include <linux/iio/events.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/triggered_buffer.h>
@@ -30,6 +32,8 @@
#define MPL3115_WHO_AM_I 0x0c
#define MPL3115_INT_SOURCE 0x12
#define MPL3115_PT_DATA_CFG 0x13
+#define MPL3115_PRESS_TGT 0x16 /* MSB first, 16 bit */
+#define MPL3115_TEMP_TGT 0x18
#define MPL3115_CTRL_REG1 0x26
#define MPL3115_CTRL_REG2 0x27
#define MPL3115_CTRL_REG3 0x28
@@ -42,6 +46,8 @@
#define MPL3115_STATUS_TEMP_RDY BIT(1)
#define MPL3115_INT_SRC_DRDY BIT(7)
+#define MPL3115_INT_SRC_PTH BIT(3)
+#define MPL3115_INT_SRC_TTH BIT(2)
#define MPL3115_PT_DATA_EVENT_ALL GENMASK(2, 0)
@@ -56,6 +62,8 @@
#define MPL3115_CTRL3_IPOL2 BIT(1)
#define MPL3115_CTRL4_INT_EN_DRDY BIT(7)
+#define MPL3115_CTRL4_INT_EN_PTH BIT(3)
+#define MPL3115_CTRL4_INT_EN_TTH BIT(2)
#define MPL3115_CTRL5_INT_CFG_DRDY BIT(7)
@@ -307,6 +315,15 @@ static irqreturn_t mpl3115_trigger_handler(int irq, void *p)
return IRQ_HANDLED;
}
+static const struct iio_event_spec mpl3115_temp_press_event[] = {
+ {
+ .type = IIO_EV_TYPE_THRESH,
+ .dir = IIO_EV_DIR_RISING,
+ .mask_separate = BIT(IIO_EV_INFO_ENABLE) |
+ BIT(IIO_EV_INFO_VALUE),
+ },
+};
+
static const struct iio_chan_spec mpl3115_channels[] = {
{
.type = IIO_PRESSURE,
@@ -322,7 +339,9 @@ static const struct iio_chan_spec mpl3115_channels[] = {
.storagebits = 32,
.shift = 12,
.endianness = IIO_BE,
- }
+ },
+ .event_spec = mpl3115_temp_press_event,
+ .num_event_specs = ARRAY_SIZE(mpl3115_temp_press_event),
},
{
.type = IIO_TEMP,
@@ -338,7 +357,9 @@ static const struct iio_chan_spec mpl3115_channels[] = {
.storagebits = 16,
.shift = 4,
.endianness = IIO_BE,
- }
+ },
+ .event_spec = mpl3115_temp_press_event,
+ .num_event_specs = ARRAY_SIZE(mpl3115_temp_press_event),
},
IIO_CHAN_SOFT_TIMESTAMP(2),
};
@@ -348,15 +369,45 @@ static irqreturn_t mpl3115_interrupt_handler(int irq, void *private)
struct iio_dev *indio_dev = private;
struct mpl3115_data *data = iio_priv(indio_dev);
int ret;
+ __be32 val_press;
+ __be16 val_temp;
ret = i2c_smbus_read_byte_data(data->client, MPL3115_INT_SOURCE);
if (ret < 0)
return IRQ_HANDLED;
- if (!(ret & MPL3115_INT_SRC_DRDY))
+ if (!(ret & (MPL3115_INT_SRC_DRDY | MPL3115_INT_SRC_PTH |
+ MPL3115_INT_SRC_TTH)))
return IRQ_NONE;
- iio_trigger_poll_nested(data->drdy_trig);
+ if (ret & MPL3115_INT_SRC_DRDY)
+ iio_trigger_poll_nested(data->drdy_trig);
+
+ if (ret & MPL3115_INT_SRC_PTH) {
+ iio_push_event(indio_dev,
+ IIO_UNMOD_EVENT_CODE(IIO_PRESSURE, 0,
+ IIO_EV_TYPE_THRESH,
+ IIO_EV_DIR_RISING),
+ iio_get_time_ns(indio_dev));
+
+ /* Reset the SRC_PTH bit in INT_SOURCE */
+ i2c_smbus_read_i2c_block_data(data->client,
+ MPL3115_OUT_PRESS,
+ 3, (u8 *) &val_press);
+ }
+
+ if (ret & MPL3115_INT_SRC_TTH) {
+ iio_push_event(indio_dev,
+ IIO_UNMOD_EVENT_CODE(IIO_TEMP, 0,
+ IIO_EV_TYPE_THRESH,
+ IIO_EV_DIR_RISING),
+ iio_get_time_ns(indio_dev));
+
+ /* Reset the SRC_TTH bit in INT_SOURCE */
+ i2c_smbus_read_i2c_block_data(data->client,
+ MPL3115_OUT_TEMP,
+ 2, (u8 *) &val_temp);
+ }
return IRQ_HANDLED;
}
@@ -391,18 +442,22 @@ static int mpl3115_set_trigger_state(struct iio_trigger *trig, bool state)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct mpl3115_data *data = iio_priv(indio_dev);
- u8 ctrl_reg1 = data->ctrl_reg1;
- u8 ctrl_reg4 = data->ctrl_reg4;
+ u8 ctrl_reg1, ctrl_reg4;
+
+ guard(mutex)(&data->lock);
+
+ ctrl_reg1 = data->ctrl_reg1;
+ ctrl_reg4 = data->ctrl_reg4;
if (state) {
ctrl_reg1 |= MPL3115_CTRL1_ACTIVE;
ctrl_reg4 |= MPL3115_CTRL4_INT_EN_DRDY;
} else {
- ctrl_reg1 &= ~MPL3115_CTRL1_ACTIVE;
ctrl_reg4 &= ~MPL3115_CTRL4_INT_EN_DRDY;
- }
- guard(mutex)(&data->lock);
+ if (!ctrl_reg4)
+ ctrl_reg1 &= ~MPL3115_CTRL1_ACTIVE;
+ }
return mpl3115_config_interrupt(data, ctrl_reg1, ctrl_reg4);
}
@@ -411,10 +466,156 @@ static const struct iio_trigger_ops mpl3115_trigger_ops = {
.set_trigger_state = mpl3115_set_trigger_state,
};
+static int mpl3115_read_event_config(struct iio_dev *indio_dev,
+ const struct iio_chan_spec *chan,
+ enum iio_event_type type,
+ enum iio_event_direction dir)
+{
+ struct mpl3115_data *data = iio_priv(indio_dev);
+ u8 int_en_mask;
+
+ switch (chan->type) {
+ case IIO_PRESSURE:
+ int_en_mask = MPL3115_CTRL4_INT_EN_PTH;
+ break;
+ case IIO_TEMP:
+ int_en_mask = MPL3115_CTRL4_INT_EN_TTH;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return !!(data->ctrl_reg4 & int_en_mask);
+}
+
+static int mpl3115_write_event_config(struct iio_dev *indio_dev,
+ const struct iio_chan_spec *chan,
+ enum iio_event_type type,
+ enum iio_event_direction dir,
+ bool state)
+{
+ struct mpl3115_data *data = iio_priv(indio_dev);
+ u8 int_en_mask;
+ u8 ctrl_reg1, ctrl_reg4;
+
+ switch (chan->type) {
+ case IIO_PRESSURE:
+ int_en_mask = MPL3115_CTRL4_INT_EN_PTH;
+ break;
+ case IIO_TEMP:
+ int_en_mask = MPL3115_CTRL4_INT_EN_TTH;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ guard(mutex)(&data->lock);
+
+ ctrl_reg1 = data->ctrl_reg1;
+ ctrl_reg4 = data->ctrl_reg4;
+
+ if (state) {
+ ctrl_reg1 |= MPL3115_CTRL1_ACTIVE;
+ ctrl_reg4 |= int_en_mask;
+ } else {
+ ctrl_reg4 &= ~int_en_mask;
+
+ if (!ctrl_reg4)
+ ctrl_reg1 &= ~MPL3115_CTRL1_ACTIVE;
+ }
+
+ return mpl3115_config_interrupt(data, ctrl_reg1, ctrl_reg4);
+}
+
+static int mpl3115_read_thresh(struct iio_dev *indio_dev,
+ const struct iio_chan_spec *chan,
+ enum iio_event_type type,
+ enum iio_event_direction dir,
+ enum iio_event_info info,
+ int *val, int *val2)
+{
+ struct mpl3115_data *data = iio_priv(indio_dev);
+ int ret, press_pa;
+ __be16 tmp;
+
+ if (info != IIO_EV_INFO_VALUE)
+ return -EINVAL;
+
+ switch (chan->type) {
+ case IIO_PRESSURE:
+ ret = i2c_smbus_read_i2c_block_data(data->client,
+ MPL3115_PRESS_TGT, 2,
+ (u8 *) &tmp);
+ if (ret < 0)
+ return ret;
+
+ /**
+ * Target value for the pressure is
+ * 16-bit unsigned value in 2 Pa units
+ */
+ press_pa = be16_to_cpu(tmp) << 1;
+ *val = press_pa / KILO;
+ *val2 = (press_pa % KILO) * MILLI;
+
+ return IIO_VAL_INT_PLUS_MICRO;
+ case IIO_TEMP:
+ ret = i2c_smbus_read_byte_data(data->client, MPL3115_TEMP_TGT);
+ if (ret < 0)
+ return ret;
+
+ /* Target value for the temperature is 8-bit 2's complement */
+ *val = sign_extend32(ret, 7);
+
+ return IIO_VAL_INT;
+ default:
+ return -EINVAL;
+ }
+}
+
+static int mpl3115_write_thresh(struct iio_dev *indio_dev,
+ const struct iio_chan_spec *chan,
+ enum iio_event_type type,
+ enum iio_event_direction dir,
+ enum iio_event_info info,
+ int val, int val2)
+{
+ struct mpl3115_data *data = iio_priv(indio_dev);
+ u8 tmp[2];
+
+ if (info != IIO_EV_INFO_VALUE)
+ return -EINVAL;
+
+ switch (chan->type) {
+ case IIO_PRESSURE:
+ val = (val * KILO + val2 / MILLI) >> 1;
+
+ if (val < 0 || val > 0xffff)
+ return -EINVAL;
+
+ tmp[0] = FIELD_GET(GENMASK(15, 8), val);
+ tmp[1] = FIELD_GET(GENMASK(7, 0), val);
+
+ return i2c_smbus_write_i2c_block_data(data->client,
+ MPL3115_PRESS_TGT, 2, tmp);
+ case IIO_TEMP:
+ if (val < -128 || val > 127)
+ return -EINVAL;
+
+ return i2c_smbus_write_byte_data(data->client,
+ MPL3115_TEMP_TGT, val);
+ default:
+ return -EINVAL;
+ }
+}
+
static const struct iio_info mpl3115_info = {
.read_raw = &mpl3115_read_raw,
.read_avail = &mpl3115_read_avail,
.write_raw = &mpl3115_write_raw,
+ .read_event_config = mpl3115_read_event_config,
+ .write_event_config = mpl3115_write_event_config,
+ .read_event_value = mpl3115_read_thresh,
+ .write_event_value = mpl3115_write_thresh,
};
static int mpl3115_trigger_probe(struct mpl3115_data *data,
--
2.25.1
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