linux-kernel - Re: [PATCH v6 6/8] phy: qualcomm: qmp-combo: Update QMP PHY with Glymur settings

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Message-ID: <ysekkn5mxwq47bnra5ocwfeacfa2gujhmgvivorupn73npsrnl@2cig7cjdvhuy>
Date: Wed, 29 Oct 2025 00:30:42 +0200
From: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
To: Wesley Cheng <wesley.cheng@....qualcomm.com>
Cc: Vinod Koul <vkoul@...nel.org>, Kishon Vijay Abraham I <kishon@...nel.org>,
        Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Wesley Cheng <quic_wcheng@...cinc.com>,
        Abel Vesa <abel.vesa@...aro.org>, linux-arm-msm@...r.kernel.org,
        linux-phy@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v6 6/8] phy: qualcomm: qmp-combo: Update QMP PHY with
 Glymur settings

On Tue, Oct 28, 2025 at 03:15:33PM -0700, Wesley Cheng wrote:
> 
> 
> On 10/27/2025 7:21 AM, Dmitry Baryshkov wrote:
> > On Fri, Oct 24, 2025 at 05:47:44PM -0700, Wesley Cheng wrote:
> > > For SuperSpeed USB to work properly, there is a set of HW settings that
> > > need to be programmed into the USB blocks within the QMP PHY.  Ensure that
> > > these settings follow the latest settings mentioned in the HW programming
> > > guide.  The QMP USB PHY on Glymur is a USB43 based PHY that will have some
> > > new ways to define certain registers, such as the replacement of TXA/RXA
> > > and TXB/RXB register sets.  This was replaced with the LALB register set.
> > > 
> > > There are also some PHY init updates to modify the PCS MISC register space.
> > > Without these, the QMP PHY PLL locking fails.
> > > 
> > > Signed-off-by: Wesley Cheng <wesley.cheng@....qualcomm.com>
> > > ---
> > >   drivers/phy/qualcomm/phy-qcom-qmp-combo.c          | 288 ++++++++++
> > >   drivers/phy/qualcomm/phy-qcom-qmp-pcs-aon-v8.h     |  17 +
> > >   drivers/phy/qualcomm/phy-qcom-qmp-pcs-misc-v8.h    |  12 +
> > >   .../phy/qualcomm/phy-qcom-qmp-qserdes-lalb-v8.h    | 639 +++++++++++++++++++++
> > >   drivers/phy/qualcomm/phy-qcom-qmp-usb43-pcs-v8.h   |  33 ++
> > >   .../qualcomm/phy-qcom-qmp-usb43-qserdes-com-v8.h   | 224 ++++++++
> > >   drivers/phy/qualcomm/phy-qcom-qmp.h                |   2 +
> > >   7 files changed, 1215 insertions(+)
> > > 
> > > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> > > index 1caa1fb6a8c7..d1534ed7200b 100644
> > > --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> > > +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> > > @@ -30,9 +30,11 @@
> > >   #include "phy-qcom-qmp.h"
> > >   #include "phy-qcom-qmp-pcs-aon-v6.h"
> > > +#include "phy-qcom-qmp-pcs-aon-v8.h"
> > >   #include "phy-qcom-qmp-pcs-misc-v3.h"
> > >   #include "phy-qcom-qmp-pcs-misc-v4.h"
> > >   #include "phy-qcom-qmp-pcs-misc-v5.h"
> > > +#include "phy-qcom-qmp-pcs-misc-v8.h"
> > >   #include "phy-qcom-qmp-pcs-usb-v4.h"
> > >   #include "phy-qcom-qmp-pcs-usb-v5.h"
> > >   #include "phy-qcom-qmp-pcs-usb-v6.h"
> > > @@ -46,6 +48,8 @@
> > >   #include "phy-qcom-qmp-dp-phy-v5.h"
> > >   #include "phy-qcom-qmp-dp-phy-v6.h"
> > > +#include "phy-qcom-qmp-usb43-pcs-v8.h"
> > > +
> > >   /* QPHY_V3_DP_COM_RESET_OVRD_CTRL register bits */
> > >   /* DP PHY soft reset */
> > >   #define SW_DPPHY_RESET				BIT(0)
> > > @@ -97,6 +101,7 @@ enum qphy_reg_layout {
> > >   	QPHY_TX_HIGHZ_DRVR_EN,
> > >   	QPHY_TX_TRANSCEIVER_BIAS_EN,
> > > +	QPHY_AON_TOGGLE_ENABLE,
> > >   	/* Keep last to ensure regs_layout arrays are properly initialized */
> > >   	QPHY_LAYOUT_SIZE
> > >   };
> > > @@ -259,6 +264,236 @@ static const unsigned int qmp_v8_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
> > >   	[QPHY_TX_TRANSCEIVER_BIAS_EN]	= QSERDES_V8_TX_TRANSCEIVER_BIAS_EN,
> > >   };
> > > +static const unsigned int qmp_v8_n3_usb43dpphy_regs_layout[QPHY_LAYOUT_SIZE] = {
> > > +	[QPHY_SW_RESET]			= QPHY_V6_N4_PCS_SW_RESET,
> > > +	[QPHY_START_CTRL]			= QPHY_V6_N4_PCS_START_CONTROL,
> > > +	[QPHY_PCS_STATUS]			= QPHY_V6_N4_PCS_PCS_STATUS1,
> > > +	[QPHY_PCS_POWER_DOWN_CONTROL]	= QPHY_V6_N4_PCS_POWER_DOWN_CONTROL,
> > 
> > V8 PHY should not be using V6 register offsets.
> > 
> > > +
> > > +	/* In PCS_USB */
> > > +	[QPHY_PCS_AUTONOMOUS_MODE_CTRL]	= QPHY_V6_PCS_USB3_AUTONOMOUS_MODE_CTRL,
> > > +	[QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR]	= QPHY_V6_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR,
> > > +
> > > +	[QPHY_AON_TOGGLE_ENABLE]		= QPHY_V8_PCS_AON_USB3_AON_TOGGLE_ENABLE,
> > > +
> > > +	[QPHY_COM_RESETSM_CNTRL]		= QSERDES_V6_COM_RESETSM_CNTRL,
> > > +	[QPHY_COM_C_READY_STATUS]		= QSERDES_V6_COM_C_READY_STATUS,
> > > +	[QPHY_COM_CMN_STATUS]		= QSERDES_V6_COM_CMN_STATUS,
> > > +	[QPHY_COM_BIAS_EN_CLKBUFLR_EN]	= QSERDES_V6_COM_PLL_BIAS_EN_CLK_BUFLR_EN,
> > > +
> > > +	[QPHY_DP_PHY_STATUS]		= QSERDES_V6_DP_PHY_STATUS,
> > > +	[QPHY_DP_PHY_VCO_DIV]		= QSERDES_V6_DP_PHY_VCO_DIV,
> > > +
> > > +	[QPHY_TX_TX_POL_INV]		= QSERDES_V6_N4_TX_TX_POL_INV,
> > > +	[QPHY_TX_TX_DRV_LVL]		= QSERDES_V6_N4_TX_TX_DRV_LVL,
> > > +	[QPHY_TX_TX_EMP_POST1_LVL]		= QSERDES_V6_N4_TX_TX_EMP_POST1_LVL,
> > > +	[QPHY_TX_HIGHZ_DRVR_EN]		= QSERDES_V6_N4_TX_HIGHZ_DRVR_EN,
> > > +	[QPHY_TX_TRANSCEIVER_BIAS_EN]	= QSERDES_V6_N4_TX_TRANSCEIVER_BIAS_EN,
> > > +};
> > > +
> > > @@ -2528,6 +2784,27 @@ static const struct qmp_phy_cfg sm8750_usb3dpphy_cfg = {
> > >   	.num_vregs		= ARRAY_SIZE(qmp_phy_vreg_l),
> > >   };
> > > +static const struct qmp_phy_cfg glymur_usb3dpphy_cfg = {
> > > +	.offsets		= &qmp_combo_usb43dp_offsets_v8,
> > > +
> > > +	.serdes_tbl		= glymur_usb43dp_serdes_tbl,
> > > +	.serdes_tbl_num		= ARRAY_SIZE(glymur_usb43dp_serdes_tbl),
> > > +	.tx_tbl			= glymur_usb43dp_lalb_tbl,
> > > +	.tx_tbl_num		= ARRAY_SIZE(glymur_usb43dp_lalb_tbl),
> > > +	.pcs_tbl		= glymur_usb43dp_pcs_tbl,
> > > +	.pcs_tbl_num		= ARRAY_SIZE(glymur_usb43dp_pcs_tbl),
> > > +	.pcs_usb_tbl		= glymur_usb43dp_pcs_usb_tbl,
> > > +	.pcs_usb_tbl_num	= ARRAY_SIZE(glymur_usb43dp_pcs_usb_tbl),
> > > +	.pcs_misc_tbl		= glymur_usb43dp_pcs_misc_tbl,
> > > +	.pcs_misc_tbl_num	= ARRAY_SIZE(glymur_usb43dp_pcs_misc_tbl),
> > 
> > DP tables are missing.
> > 
> 
> Hi Dmitry,
> 
> I think I discussed this with Abel on the previous patch revision.  At the
> moment I did not add support for DP, so we shouldn't add the tables, unless
> you think we should still have placeholder?

Please add DP support.

-- 
With best wishes
Dmitry