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Message-ID: <b5bb5cdb-643a-73f9-bac6-0d2876756bb6@oss.qualcomm.com>
Date: Tue, 28 Oct 2025 10:54:28 +0530
From: Dikshita Agarwal <dikshita.agarwal@....qualcomm.com>
To: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>,
Vikash Garodia <vikash.garodia@....qualcomm.com>,
Abhinav Kumar <abhinav.kumar@...ux.dev>,
Bryan O'Donoghue <bod@...nel.org>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Cc: linux-media@...r.kernel.org, linux-arm-msm@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v5 6/6] media: iris: enable support for SC7280 platform
On 10/27/2025 5:57 PM, Dmitry Baryshkov wrote:
> As a part of migrating code from the old Venus driver to the new Iris
> one, add support for the SC7280 platform. It is very similar to SM8250,
> but it (currently) uses no reset controls (there is an optional
> GCC-generated reset, it will be added later) and no AON registers
> region. Extend the VPU ops to support optional clocks and skip the AON
> shutdown for this platform.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
> ---
> .../platform/qcom/iris/iris_platform_common.h | 4 ++
> .../media/platform/qcom/iris/iris_platform_gen1.c | 53 ++++++++++++++++++++++
> .../platform/qcom/iris/iris_platform_sc7280.h | 27 +++++++++++
> drivers/media/platform/qcom/iris/iris_probe.c | 4 ++
> drivers/media/platform/qcom/iris/iris_resources.c | 2 +-
> drivers/media/platform/qcom/iris/iris_vpu2.c | 6 +++
> drivers/media/platform/qcom/iris/iris_vpu_common.c | 34 ++++++++++----
> 7 files changed, 120 insertions(+), 10 deletions(-)
>
<Snip>
> +
> +const struct iris_platform_data sc7280_data = {
> + .get_instance = iris_hfi_gen1_get_instance,
> + .init_hfi_command_ops = &iris_hfi_gen1_command_ops_init,
> + .init_hfi_response_ops = iris_hfi_gen1_response_ops_init,
> + .get_vpu_buffer_size = iris_vpu_buf_size,
> + .vpu_ops = &iris_vpu2_ops,
> + .set_preset_registers = iris_set_sm8250_preset_registers,
> + .icc_tbl = sm8250_icc_table,
> + .icc_tbl_size = ARRAY_SIZE(sm8250_icc_table),
> + .bw_tbl_dec = sc7280_bw_table_dec,
> + .bw_tbl_dec_size = ARRAY_SIZE(sc7280_bw_table_dec),
> + .pmdomain_tbl = sm8250_pmdomain_table,
> + .pmdomain_tbl_size = ARRAY_SIZE(sm8250_pmdomain_table),
> + .opp_pd_tbl = sc7280_opp_pd_table,
> + .opp_pd_tbl_size = ARRAY_SIZE(sc7280_opp_pd_table),
> + .clk_tbl = sc7280_clk_table,
> + .clk_tbl_size = ARRAY_SIZE(sc7280_clk_table),
> + /* Upper bound of DMA address range */
> + .dma_mask = 0xe0000000 - 1,
> + .fwname = "qcom/vpu/vpu20_p1.mbn",
> + .pas_id = IRIS_PAS_ID,
> + .inst_caps = &platform_inst_cap_sm8250,
> + .inst_fw_caps_dec = inst_fw_cap_sm8250_dec,
> + .inst_fw_caps_dec_size = ARRAY_SIZE(inst_fw_cap_sm8250_dec),
> + .inst_fw_caps_enc = inst_fw_cap_sm8250_enc,
> + .inst_fw_caps_enc_size = ARRAY_SIZE(inst_fw_cap_sm8250_enc),
> + .tz_cp_config_data = &tz_cp_config_sm8250,
> + .hw_response_timeout = HW_RESPONSE_TIMEOUT_VALUE,
> + .num_vpp_pipe = 1,
> + .no_aon = true,
> + .max_session_count = 16,
> + .max_core_mbpf = NUM_MBS_8K,
May be I wasn't clear in previous comments, what I menat was.
max_core_mbpf = ((4096x2176)/256) x 2 + (1920x1088)/256
> + /* max spec for SC7280 is 4096x2176@...ps */
> + .max_core_mbps = (4096 * 2176 * 2 + 1920 * 1088) / 256 * 60,
max_core_mbps = ((4096x2176)/256 ) * 60 fps
> + .dec_input_config_params_default =
> + sm8250_vdec_input_config_param_default,
> + .dec_input_config_params_default_size =
> + ARRAY_SIZE(sm8250_vdec_input_config_param_default),
> + .enc_input_config_params = sm8250_venc_input_config_param,
> + .enc_input_config_params_size =
> + ARRAY_SIZE(sm8250_venc_input_config_param),
> +
> + .dec_ip_int_buf_tbl = sm8250_dec_ip_int_buf_tbl,
> + .dec_ip_int_buf_tbl_size = ARRAY_SIZE(sm8250_dec_ip_int_buf_tbl),
> + .dec_op_int_buf_tbl = sm8250_dec_op_int_buf_tbl,
> + .dec_op_int_buf_tbl_size = ARRAY_SIZE(sm8250_dec_op_int_buf_tbl),
> +
> + .enc_ip_int_buf_tbl = sm8250_enc_ip_int_buf_tbl,
> + .enc_ip_int_buf_tbl_size = ARRAY_SIZE(sm8250_enc_ip_int_buf_tbl),
> +};
<Snip>
> @@ -318,13 +328,19 @@ int iris_vpu_power_on_hw(struct iris_core *core)
> if (ret)
> goto err_disable_power;
>
> + ret = iris_prepare_enable_clock(core, IRIS_HW_AHB_CLK);
> + if (ret && ret != -ENOENT)
> + goto err_disable_hw_clock;
> +
> ret = dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN], true);
> if (ret)
> - goto err_disable_clock;
> + goto err_disable_hw_axi_clock;
>
> return 0;
>
> -err_disable_clock:
> +err_disable_hw_axi_clock:
Seems you missed this comment,
This label needs an update s/err_disable_hw_axi_clock/err_disable_hw_ahb_clock
Thanks,
Dikshita
> + iris_disable_unprepare_clock(core, IRIS_HW_AHB_CLK);> +err_disable_hw_clock:
> iris_disable_unprepare_clock(core, IRIS_HW_CLK);
> err_disable_power:
> iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN]);
>
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