Message-Id: <20251027-cpu_cluster_component_pm-v1-0-31355ac588c2@oss.qualcomm.com>
Date: Mon, 27 Oct 2025 23:28:02 -0700
From: Yuanfang Zhang <yuanfang.zhang@....qualcomm.com>
To: Suzuki K Poulose <suzuki.poulose@....com>,
        Mike Leach <mike.leach@...aro.org>,
        James Clark <james.clark@...aro.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Mathieu Poirier <mathieu.poirier@...aro.org>,
        Leo Yan <leo.yan@...ux.dev>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>
Cc: kernel@....qualcomm.com, coresight@...ts.linaro.org,
        linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
        Yuanfang Zhang <yuanfang.zhang@....qualcomm.com>,
        Jie Gan <jie.gan@....qualcomm.com>
Subject: [PATCH 00/12] coresight: Add CPU cluster funnel/replicator/tmc
 support

This patch series introduces support for CPU cluster local CoreSight components,
including funnel, replicator, and TMC, which reside inside CPU cluster
power domains. These components require special handling due to power
domain constraints.

Unlike system-level CoreSight devices, CPU cluster local components share the
power domain of the CPU cluster. When the cluster enters low-power mode (LPM),
the registers of these components become inaccessible. Importantly, `pm_runtime_get`
calls alone are insufficient to bring the CPU cluster out of LPM, making
standard register access unreliable in such cases.

To address this, the series introduces:
- Device tree bindings for CPU cluster local funnel, replicator, and TMC.
- Introduce a cpumask to record the CPUs belonging to the cluster where the
  cpu cluster local component resides.
- Safe register access via smp_call_function_single() on CPUs within the
  associated cpumask, ensuring the cluster is power-resident during access.
- Delayed probe support for CPU cluster local components when all CPUs of
  this CPU cluster are offline, re-probe the component when any CPU in the
  cluster comes online.
- Introduce `cs_mode` to link enable interfaces to avoid the use
  smp_call_function_single() under perf mode.

Patch summary:
Patch 1: Adds device tree bindings for CPU cluster funnel/replicator/TMC devices.
Patches 2–3: Add support for CPU cluster funnel.
Patches 4-6: Add support for CPU cluster replicator.
Patches 7-10: Add support for CPU cluster TMC.
Patch 11: Add 'cs_mode' to link enable functions.
Patches 12-13: Add Coresight nodes for APSS debug block for x1e80100 and
fix build issue.

Verification:

This series has been verified on sm8750.

Test steps for delay probe:

1. limit the system to enable at most 6 CPU cores during boot.
2. echo 1 >/sys/bus/cpu/devices/cpu6/online.
3. check whether ETM6 and ETM7 have been probed.

Test steps for sysfs mode:

echo 1 >/sys/bus/coresight/devices/tmc_etf0/enable_sink
echo 1 >/sys/bus/coresight/devices/etm0/enable_source
echo 1 >/sys/bus/coresight/devices/etm6/enable_source
echo 0 >/sys/bus/coresight/devices/etm0/enable_source
echo 0 >/sys/bus/coresight/devicse/etm6/enable_source
echo 0 >/sys/bus/coresight/devices/tmc_etf0/enable_sink

echo 1 >/sys/bus/coresight/devices/tmc_etf1/enable_sink
echo 1 >/sys/bus/coresight/devcies/etm0/enable_source
cat /dev/tmc_etf1 >/tmp/etf1.bin
echo 0 >/sys/bus/coresight/devices/etm0/enable_source
echo 0 >/sys/bus/coresight/devices/tmc_etf1/enable_sink

echo 1 >/sys/bus/coresight/devices/tmc_etf2/enable_sink
echo 1 >/sys/bus/coresight/devices/etm6/enable_source
cat /dev/tmc_etf2 >/tmp/etf2.bin
echo 0 >/sys/bus/coresight/devices/etm6/enable_source
echo 0 >/sys/bus/coresight/devices/tmc_etf2/enable_sink

Test steps for sysfs node:

cat /sys/bus/coresight/devices/tmc_etf*/mgmt/*

cat /sys/bus/coresight/devices/funnel*/funnel_ctrl

cat /sys/bus/coresight/devices/replicator*/mgmt/*

Test steps for perf mode:

perf record -a -e cs_etm//k -- sleep 5

Signed-off-by: Yuanfang Zhang <yuanfang.zhang@....qualcomm.com>
---
Yuanfang Zhang (12):
      dt-bindings: arm: coresight: Add cpu cluster tmc/funnel/replicator support
      coresight-funnel: Add support for CPU cluster funnel
      coresight-funnel: Handle delay probe for CPU cluster funnel
      coresight-replicator: Add support for CPU cluster replicator
      coresight-replicator: Handle delayed probe for CPU cluster replicator
      coresight-replicator: Update mgmt_attrs for CPU cluster replicator compatibility
      coresight-tmc: Add support for CPU cluster ETF and refactor probe flow
      coresight-tmc-etf: Refactor enable function for CPU cluster ETF support
      coresight-tmc: Update tmc_mgmt_attrs for CPU cluster TMC compatibility
      coresight-tmc: Handle delayed probe for CPU cluster TMC
      coresight: add 'cs_mode' to link enable functions
      arm64: dts: qcom: x1e80100: add Coresight nodes for APSS debug block

 .../bindings/arm/arm,coresight-dynamic-funnel.yaml |  23 +-
 .../arm/arm,coresight-dynamic-replicator.yaml      |  22 +-
 .../devicetree/bindings/arm/arm,coresight-tmc.yaml |  22 +-
 arch/arm64/boot/dts/qcom/x1e80100.dtsi             | 885 +++++++++++++++++++++
 arch/arm64/boot/dts/qcom/x1p42100.dtsi             |  12 +
 drivers/hwtracing/coresight/coresight-core.c       |   7 +-
 drivers/hwtracing/coresight/coresight-funnel.c     | 260 +++++-
 drivers/hwtracing/coresight/coresight-replicator.c | 343 +++++++-
 drivers/hwtracing/coresight/coresight-tmc-core.c   | 396 +++++++--
 drivers/hwtracing/coresight/coresight-tmc-etf.c    | 105 ++-
 drivers/hwtracing/coresight/coresight-tmc.h        |  10 +
 drivers/hwtracing/coresight/coresight-tnoc.c       |   3 +-
 drivers/hwtracing/coresight/coresight-tpda.c       |   3 +-
 include/linux/coresight.h                          |   3 +-
 14 files changed, 1912 insertions(+), 182 deletions(-)
---
base-commit: 01f96b812526a2c8dcd5c0e510dda37e09ec8bcd
change-id: 20251016-cpu_cluster_component_pm-ce518f510433

Best regards,
-- 
Yuanfang Zhang <yuanfang.zhang@....qualcomm.com>

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