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Message-Id: <20251027-cpu_cluster_component_pm-v1-8-31355ac588c2@oss.qualcomm.com>
Date: Mon, 27 Oct 2025 23:28:10 -0700
From: Yuanfang Zhang <yuanfang.zhang@....qualcomm.com>
To: Suzuki K Poulose <suzuki.poulose@....com>,
Mike Leach <mike.leach@...aro.org>,
James Clark <james.clark@...aro.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Mathieu Poirier <mathieu.poirier@...aro.org>,
Leo Yan <leo.yan@...ux.dev>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>
Cc: kernel@....qualcomm.com, coresight@...ts.linaro.org,
linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
Yuanfang Zhang <yuanfang.zhang@....qualcomm.com>
Subject: [PATCH 08/12] coresight-tmc-etf: Refactor enable function for CPU
cluster ETF support
CPU cluster TMC instances share the cluster's power domain, so register
access must occur on a CPU that keeps the domain powered. To ensure safe
ETF enable sequences on such devices, split tmc_etf/etb_enable_hw function
into two variants:
- tmc_etf/etb_enable_hw_local: replaces the old tmc_etf/etb_enable_hw for
normal ETF cases
- tmc_etf/etb_enable_hw_smp_call: executes CPU cluster ETF enable on a CPU
within the cluster via smp_call_function_single
Also add a check to ensure the current CPU belongs to the cluster before
calling tmc_etb_enable_hw_local for CPU cluster ETF.
Signed-off-by: Yuanfang Zhang <yuanfang.zhang@....qualcomm.com>
---
drivers/hwtracing/coresight/coresight-tmc-etf.c | 86 ++++++++++++++++++++++---
1 file changed, 76 insertions(+), 10 deletions(-)
diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c
index 0f45ab5e5249933ce7059dfee7fe7376ab33ed2d..b8a1c10d4b4c49144449b33f26710cf11713b338 100644
--- a/drivers/hwtracing/coresight/coresight-tmc-etf.c
+++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c
@@ -47,7 +47,7 @@ static int __tmc_etb_enable_hw(struct tmc_drvdata *drvdata)
return rc;
}
-static int tmc_etb_enable_hw(struct tmc_drvdata *drvdata)
+static int tmc_etb_enable_hw_local(struct tmc_drvdata *drvdata)
{
int rc = coresight_claim_device(drvdata->csdev);
@@ -60,6 +60,36 @@ static int tmc_etb_enable_hw(struct tmc_drvdata *drvdata)
return rc;
}
+struct tmc_smp_arg {
+ struct tmc_drvdata *drvdata;
+ int rc;
+};
+
+static void tmc_etb_enable_hw_smp_call(void *info)
+{
+ struct tmc_smp_arg *arg = info;
+
+ arg->rc = tmc_etb_enable_hw_local(arg->drvdata);
+}
+
+static int tmc_etb_enable_hw(struct tmc_drvdata *drvdata)
+{
+ int cpu, ret;
+ struct tmc_smp_arg arg = { 0 };
+
+ if (!drvdata->cpumask)
+ return tmc_etb_enable_hw_local(drvdata);
+
+ arg.drvdata = drvdata;
+ for_each_cpu(cpu, drvdata->cpumask) {
+ ret = smp_call_function_single(cpu,
+ tmc_etb_enable_hw_smp_call, &arg, 1);
+ if (!ret)
+ return arg.rc;
+ }
+ return ret;
+}
+
static void tmc_etb_dump_hw(struct tmc_drvdata *drvdata)
{
char *bufp;
@@ -130,7 +160,7 @@ static int __tmc_etf_enable_hw(struct tmc_drvdata *drvdata)
return rc;
}
-static int tmc_etf_enable_hw(struct tmc_drvdata *drvdata)
+static int tmc_etf_enable_hw_local(struct tmc_drvdata *drvdata)
{
int rc = coresight_claim_device(drvdata->csdev);
@@ -143,6 +173,32 @@ static int tmc_etf_enable_hw(struct tmc_drvdata *drvdata)
return rc;
}
+static void tmc_etf_enable_hw_smp_call(void *info)
+{
+ struct tmc_smp_arg *arg = info;
+
+ arg->rc = tmc_etf_enable_hw_local(arg->drvdata);
+}
+
+static int tmc_etf_enable_hw(struct tmc_drvdata *drvdata)
+{
+ int cpu, ret;
+ struct tmc_smp_arg arg = { 0 };
+
+ if (!drvdata->cpumask)
+ return tmc_etf_enable_hw_local(drvdata);
+
+ arg.drvdata = drvdata;
+
+ for_each_cpu(cpu, drvdata->cpumask) {
+ ret = smp_call_function_single(cpu,
+ tmc_etf_enable_hw_smp_call, &arg, 1);
+ if (!ret)
+ return arg.rc;
+ }
+ return ret;
+}
+
static void tmc_etf_disable_hw(struct tmc_drvdata *drvdata)
{
struct coresight_device *csdev = drvdata->csdev;
@@ -228,7 +284,11 @@ static int tmc_enable_etf_sink_sysfs(struct coresight_device *csdev)
used = true;
drvdata->buf = buf;
}
+ raw_spin_unlock_irqrestore(&drvdata->spinlock, flags);
+
ret = tmc_etb_enable_hw(drvdata);
+
+ raw_spin_lock_irqsave(&drvdata->spinlock, flags);
if (!ret) {
coresight_set_mode(csdev, CS_MODE_SYSFS);
csdev->refcnt++;
@@ -290,7 +350,10 @@ static int tmc_enable_etf_sink_perf(struct coresight_device *csdev, void *data)
break;
}
- ret = tmc_etb_enable_hw(drvdata);
+ if (drvdata->cpumask && !cpumask_test_cpu(smp_processor_id(), drvdata->cpumask))
+ break;
+
+ ret = tmc_etb_enable_hw_local(drvdata);
if (!ret) {
/* Associate with monitored process. */
drvdata->pid = pid;
@@ -374,19 +437,22 @@ static int tmc_enable_etf_link(struct coresight_device *csdev,
return -EBUSY;
}
- if (csdev->refcnt == 0) {
+ if (csdev->refcnt == 0)
+ first_enable = true;
+
+ if (!first_enable)
+ csdev->refcnt++;
+
+ raw_spin_unlock_irqrestore(&drvdata->spinlock, flags);
+ if (first_enable) {
ret = tmc_etf_enable_hw(drvdata);
if (!ret) {
coresight_set_mode(csdev, CS_MODE_SYSFS);
- first_enable = true;
+ csdev->refcnt++;
+ dev_dbg(&csdev->dev, "TMC-ETF enabled\n");
}
}
- if (!ret)
- csdev->refcnt++;
- raw_spin_unlock_irqrestore(&drvdata->spinlock, flags);
- if (first_enable)
- dev_dbg(&csdev->dev, "TMC-ETF enabled\n");
return ret;
}
--
2.34.1
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