linux-kernel - Re: [PATCH v1 2/2] PCI: dw-rockchip: Add runtime PM support to Rockchip PCIe driver

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Message-ID: <CANAwSgRHhN5nZpKojKamTmZoY9qruwD0HJvEYFs_bqapoeRsoA@mail.gmail.com>
Date: Tue, 28 Oct 2025 15:04:40 +0530
From: Anand Moon <linux.amoon@...il.com>
To: Shawn Lin <shawn.lin@...k-chips.com>
Cc: Lorenzo Pieralisi <lpieralisi@...nel.org>, Krzysztof Wilczyński <kwilczynski@...nel.org>, 
	Manivannan Sadhasivam <mani@...nel.org>, Rob Herring <robh@...nel.org>, Bjorn Helgaas <bhelgaas@...gle.com>, 
	Heiko Stuebner <heiko@...ech.de>, Niklas Cassel <cassel@...nel.org>, Hans Zhang <18255117159@....com>, 
	Nicolas Frattaroli <nicolas.frattaroli@...labora.com>, 
	"open list:PCI NATIVE HOST BRIDGE AND ENDPOINT DRIVERS" <linux-pci@...r.kernel.org>, 
	"moderated list:ARM/Rockchip SoC support" <linux-arm-kernel@...ts.infradead.org>, 
	"open list:ARM/Rockchip SoC support" <linux-rockchip@...ts.infradead.org>, 
	open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v1 2/2] PCI: dw-rockchip: Add runtime PM support to
 Rockchip PCIe driver

Hi Shawn,

Thanks for your review comments.

On Tue, 28 Oct 2025 at 06:14, Shawn Lin <shawn.lin@...k-chips.com> wrote:
>
> 在 2025/10/27 星期一 22:55, Anand Moon 写道:
> > Add runtime power management support to the Rockchip DesignWare PCIe
> > controller driver by enabling devm_pm_runtime() in the probe function.
> > These changes allow the PCIe controller to suspend and resume dynamically,
> > improving power efficiency on supported platforms.
> >
> > Signed-off-by: Anand Moon <linux.amoon@...il.com>
> > ---
> >   drivers/pci/controller/dwc/pcie-dw-rockchip.c | 21 +++++++++++++++++++
> >   1 file changed, 21 insertions(+)
> >
> > diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> > index b878ae8e2b3e..5026598d09f8 100644
> > --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> > +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> > @@ -20,6 +20,7 @@
> >   #include <linux/of_irq.h>
> >   #include <linux/phy/phy.h>
> >   #include <linux/platform_device.h>
> > +#include <linux/pm_runtime.h>
> >   #include <linux/regmap.h>
> >   #include <linux/reset.h>
> >
> > @@ -690,6 +691,20 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
> >       if (ret)
> >               goto deinit_phy;
> >
> > +     ret = pm_runtime_set_suspended(dev);
> > +     if (ret)
> > +             goto disable_pm_runtime;
> > +
> > +     ret = devm_pm_runtime_enable(dev);
> > +     if (ret) {
> > +             ret = dev_err_probe(dev, ret, "Failed to enable runtime PM\n");
> > +             goto deinit_clk;
> > +     }
> > +
> > +     ret = pm_runtime_resume_and_get(dev);
> > +     if (ret)
> > +             goto disable_pm_runtime;
> > +
> >       switch (data->mode) {
> >       case DW_PCIE_RC_TYPE:
> >               ret = rockchip_pcie_configure_rc(pdev, rockchip);
> > @@ -709,7 +724,10 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
> >
> >       return 0;
> >
> > +disable_pm_runtime:
>
> We need to call reset_control_assert(rockchip->rst) before releasing the
> the pm refcount. The problem we faced on vendor kernel is there might be
> still on-going transaction from IP to the AXI which blocks genpd to be
> powered down.

Thanks, I will try to fix this in the next version.

Thanks
-Anand