[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-ID: <20251029073905.40409-1-devendra.verma@amd.com>
Date: Wed, 29 Oct 2025 13:09:03 +0530
From: Devendra K Verma <devendra.verma@....com>
To: <bhelgaas@...gle.com>, <mani@...nel.org>, <vkoul@...nel.org>
CC: <dmaengine@...r.kernel.org>, <linux-pci@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>, <michal.simek@....com>,
	<Devendra.Verma@....com>
Subject: [PATCH v6 0/2] Add AMD MDB Endpoint and non-LL mode Support
This series of patch support the following:
 - AMD MDB Endpoint Support, as part of this patch following are
   added:
   o AMD supported device ID and vendor ID (Xilinx)
   o AMD MDB specific driver data
   o AMD specific VSEC capabilities to retrieve the base of
     phys address of MDB side DDR
   o Logic to assign the offsets to LL and data blocks if
     more number of channels are enabled than configured
     in the given pci_data struct.
 - Addition of non-LL mode
   o The IP supported non-LL mode functions
   o Flexibility to choose non-LL mode via dma_slave_config
     param peripheral_config, by the client for all the vendors
     using HDMA IP.
   o Allow IP utilization if LL mode is not available
Devendra K Verma (2):
  dmaengine: dw-edma: Add AMD MDB Endpoint Support
  dmaengine: dw-edma: Add non-LL mode
 drivers/dma/dw-edma/dw-edma-core.c    |  41 ++++++++-
 drivers/dma/dw-edma/dw-edma-core.h    |   1 +
 drivers/dma/dw-edma/dw-edma-pcie.c    | 169 ++++++++++++++++++++++++++++++++--
 drivers/dma/dw-edma/dw-hdma-v0-core.c |  61 +++++++++++-
 drivers/dma/dw-edma/dw-hdma-v0-regs.h |   1 +
 include/linux/dma/edma.h              |   1 +
 6 files changed, 260 insertions(+), 14 deletions(-)
-- 
1.8.3.1
Powered by blists - more mailing lists
 
