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Message-ID: <34d86deb-1087-4112-ba7d-bbc0cc542635@nvidia.com>
Date: Wed, 29 Oct 2025 09:55:25 +0000
From: Jon Hunter <jonathanh@...dia.com>
To: webgeek1234@...il.com, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, Thierry Reding <thierry.reding@...il.com>
Cc: devicetree@...r.kernel.org, linux-tegra@...r.kernel.org,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: tegra: Enable NVDEC and NVENC on Tegra210


On 16/08/2025 07:03, Aaron Kling via B4 Relay wrote:
> From: Aaron Kling <webgeek1234@...il.com>
> 
> The other engines are already enabled, finish filling out the media
> engine nodes and power domains.
> 
> Signed-off-by: Aaron Kling <webgeek1234@...il.com>
> ---
>   arch/arm64/boot/dts/nvidia/tegra210.dtsi | 28 ++++++++++++++++++++++++++--
>   1 file changed, 26 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
> index 402b0ede1472af625d9d9e811f5af306d436cc98..80d7571d0350205b080bcf48b8b8e2c1b93227f2 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
> @@ -277,13 +277,25 @@ dsib: dsi@...00000 {
>   		nvdec@...80000 {
>   			compatible = "nvidia,tegra210-nvdec";
>   			reg = <0x0 0x54480000 0x0 0x00040000>;
> -			status = "disabled";
> +			clocks = <&tegra_car TEGRA210_CLK_NVDEC>;
> +			clock-names = "nvdec";
> +			resets = <&tegra_car 194>;
> +			reset-names = "nvdec";
> +
> +			iommus = <&mc TEGRA_SWGROUP_NVDEC>;
> +			power-domains = <&pd_nvdec>;
>   		};
>   
>   		nvenc@...c0000 {
>   			compatible = "nvidia,tegra210-nvenc";
>   			reg = <0x0 0x544c0000 0x0 0x00040000>;
> -			status = "disabled";
> +			clocks = <&tegra_car TEGRA210_CLK_NVENC>;
> +			clock-names = "nvenc";
> +			resets = <&tegra_car 219>;
> +			reset-names = "nvenc";
> +
> +			iommus = <&mc TEGRA_SWGROUP_NVENC>;
> +			power-domains = <&pd_nvenc>;
>   		};
>   
>   		tsec@...00000 {
> @@ -894,6 +906,18 @@ pd_audio: aud {
>   				#power-domain-cells = <0>;
>   			};
>   
> +			pd_nvenc: mpe {
> +				clocks = <&tegra_car TEGRA210_CLK_NVENC>;
> +				resets = <&tegra_car 219>;
> +				#power-domain-cells = <0>;
> +			};
> +
> +			pd_nvdec: nvdec {
> +				clocks = <&tegra_car TEGRA210_CLK_NVDEC>;
> +				resets = <&tegra_car 194>;
> +				#power-domain-cells = <0>;
> +			};
> +
>   			pd_sor: sor {
>   				clocks = <&tegra_car TEGRA210_CLK_SOR0>,
>   					 <&tegra_car TEGRA210_CLK_SOR1>,
> 

Looks good to me!

Reviewed-by: Jon Hunter <jonathanh@...dia.com>

Jon

-- 
nvpublic


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