linux-kernel - Re: [PATCH 03/24] arm64: dts: qcom: Introduce Glymur base dtsi and CRD dts

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Message-ID: <0a47016c-1d7e-4026-92bb-a13ac2ce169b@oss.qualcomm.com>
Date: Wed, 29 Oct 2025 15:30:54 +0530
From: Taniya Das <taniya.das@....qualcomm.com>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>,
        Pankaj Patil <pankaj.patil@....qualcomm.com>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH 03/24] arm64: dts: qcom: Introduce Glymur base dtsi and
 CRD dts

On 9/25/2025 3:46 PM, Konrad Dybcio wrote:
>> +		tcsrcc: clock-controller@...5044 {
>> +			compatible = "qcom,glymur-tcsr";
>> +			reg = <0x0 0x1fd5044 0x0 0x48>;
> We can map 0x1fd5000 - 0x1fd5094 inclusive, as that seems like a
> logical subblock (this would require adjusting the driver)
> 

Konrad, we encountered issues when trying to map regions beyond just the
clock reference registers. Normally, we map the entire address range of
a clock controller (CC) module in the device tree. However, for TCSRCC
where CLKREF_EN registers are located within shared modules like TCSR or
TLMM—we don't own the whole address space, and mapping the full range
can overlap with other devices.
To avoid this, we propose defining the base address as the first
register actually used, and the size to only include up to the last
register we use. This ensures we only map the relevant subblock,
preventing conflicts with other device nodes.

So want to keep the mapping same from the start of clockref clocks.

> There's also a laaaarge pool of various TCSR_ registers between
> the previous node and this one.. but we can leave that in case we
> need to describe it in a specific way some day
>> +			#clock-cells = <1>;
>> +			#reset-cells = <1>;
>> +		};
>> +

-- 
Thanks,
Taniya Das