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Message-ID: <20251030153914.GA1632785@bhelgaas>
Date: Thu, 30 Oct 2025 10:39:14 -0500
From: Bjorn Helgaas <helgaas@...nel.org>
To: Krishna Chaitanya Chundru <krishna.chundru@....qualcomm.com>
Cc: Bjorn Helgaas <bhelgaas@...gle.com>,
	Lorenzo Pieralisi <lpieralisi@...nel.org>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	chaitanya chundru <quic_krichai@...cinc.com>,
	Bjorn Andersson <andersson@...nel.org>,
	Konrad Dybcio <konradybcio@...nel.org>,
	cros-qcom-dts-watchers@...omium.org,
	Jingoo Han <jingoohan1@...il.com>,
	Bartosz Golaszewski <brgl@...ev.pl>,
	Krzysztof WilczyƄski <kwilczynski@...nel.org>,
	Manivannan Sadhasivam <mani@...nel.org>,
	Catalin Marinas <catalin.marinas@....com>,
	Will Deacon <will@...nel.org>, amitk@...nel.org,
	linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
	jorge.ramirez@....qualcomm.com,
	linux-arm-kernel@...ts.infradead.org,
	Dmitry Baryshkov <lumag@...nel.org>,
	Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>,
	Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
Subject: Re: [PATCH v7 0/8] PCI: Enable Power and configure the TC9563 PCIe
 switch

On Thu, Oct 30, 2025 at 09:13:29AM +0530, Krishna Chaitanya Chundru wrote:
> On 10/30/2025 4:53 AM, Bjorn Helgaas wrote:
> > On Wed, Oct 29, 2025 at 04:59:53PM +0530, Krishna Chaitanya Chundru wrote:
> > > TC9563 is the PCIe switch which has one upstream and three downstream
> > > ports. To one of the downstream ports ethernet MAC is connected as endpoint
> > > device. Other two downstream ports are supposed to connect to external
> > > device. One Host can connect to TC956x by upstream port.
> > > 
> > > TC9563 switch power is controlled by the GPIO's. After powering on
> > > the switch will immediately participate in the link training. if the
> > > host is also ready by that time PCIe link will established.
> > > 
> > > The TC9563 needs to configured certain parameters like de-emphasis,
> > > disable unused port etc before link is established.
> > > 
> > > As the controller starts link training before the probe of pwrctl driver,
> > > the PCIe link may come up as soon as we power on the switch. Due to this
> > > configuring the switch itself through i2c will not have any effect as
> > > this configuration needs to done before link training. To avoid this
> > > introduce two functions in pci_ops to start_link() & stop_link() which
> > > will disable the link training if the PCIe link is not up yet.
> > > 
> > > This series depends on the https://lore.kernel.org/all/20250124101038.3871768-3-krishna.chundru@oss.qualcomm.com/
> > What does this series apply to?  It doesn't apply cleanly to v6.18-rc1
> > (the normal base for topic branches) or v6.18-rc3 or pci/next.
>
> I sent this on top of rc3 as we have some dependencies with latest changes
> i.e ecam changes in dwc driver.

Oops, sorry, my fault.  I must have been trying to apply the v6 series
(not this v7) on -rc3.  This v7 *does* apply cleanly to -rc3.

But all the other topic branches are based on -rc1, so I think the
best thing is to make this one apply on -rc1 as well, and I will deal
with the resulting conflicts when merging into pci/next and ultimately
into Linus's tree.

Bjorn

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