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Message-ID: <e7h3mlj6x4k36e2ydsmbqkulh3ombhm3j4kvmw4pzlynoaaxjz@yrth4sw2tf26>
Date: Thu, 30 Oct 2025 10:23:11 +0000
From: Kiryl Shutsemau <kas@...nel.org>
To: Borislav Petkov <bp@...en8.de>
Cc: Usama Arif <usamaarif642@...il.com>, dwmw@...zon.co.uk, 
	tglx@...utronix.de, mingo@...hat.com, dave.hansen@...ux.intel.com, ardb@...nel.org, 
	hpa@...or.com, x86@...nel.org, apopple@...dia.com, thuth@...hat.com, 
	nik.borisov@...e.com, linux-kernel@...r.kernel.org, linux-efi@...r.kernel.org, 
	kernel-team@...a.com, Michael van der Westhuizen <rmikey@...a.com>, 
	Tobias Fleig <tfleig@...a.com>
Subject: Re: [PATCH v2 0/2] x86: Fix kexec 5-level to 4-level paging
 transition

On Wed, Oct 29, 2025 at 09:48:14PM +0100, Borislav Petkov wrote:
> On Tue, Oct 28, 2025 at 10:55:55AM +0000, Usama Arif wrote:
> > This series addresses critical bugs in the kexec path when transitioning
> > from a kernel using 5-level page tables to one using 4-level page tables.
> 
> Out of curiosity: what is the real-life use case for this?
> 
> Judging by the Reported-by's I guess Meta is doing some kexec-ing into default
> kernels which are 4-level so that they can work on any machine ...
> 
> Close?

Older kernels in our fleet run with 5-level paging disabled. The newer
one enables it. Machines need to switch between kernel version from time
to time for different reasons. Switching from the newer kernel to an
older one triggered the issue.

-- 
  Kiryl Shutsemau / Kirill A. Shutemov

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