linux-kernel - Re: [PATCH v6 03/11] arm64: dts: imx8mm-evk: Add supports-clkreq property to PCIe M.2 port

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Message-ID: <aQUQDyON2yJLwLhH@lizhi-Precision-Tower-5810>
Date: Fri, 31 Oct 2025 15:37:51 -0400
From: Frank Li <Frank.li@....com>
To: Richard Zhu <hongxing.zhu@....com>
Cc: l.stach@...gutronix.de, lpieralisi@...nel.org, kwilczynski@...nel.org,
	mani@...nel.org, robh@...nel.org, krzk+dt@...nel.org,
	conor+dt@...nel.org, bhelgaas@...gle.com, shawnguo@...nel.org,
	s.hauer@...gutronix.de, kernel@...gutronix.de, festevam@...il.com,
	linux-pci@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	devicetree@...r.kernel.org, imx@...ts.linux.dev,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH v6 03/11] arm64: dts: imx8mm-evk: Add supports-clkreq
 property to PCIe M.2 port

On Wed, Oct 15, 2025 at 11:04:20AM +0800, Richard Zhu wrote:
> According to PCIe r6.1, sec 5.5.1.
>
> The following rules define how the L1.1 and L1.2 substates are entered:
> Both the Upstream and Downstream Ports must monitor the logical state of
> the CLKREQ# signal.
>
> Typical implement is using open drain, which connect RC's clkreq# to
> EP's clkreq# together and pull up clkreq#.
>
> imx8mm-evk matches this requirement, so add supports-clkreq to allow
> PCIe device enter ASPM L1 Sub-State.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@....com>
> ---

Reviewed-by: Frank Li <Frank.Li@....com>

>  arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
> index ff7ca20752309..6eab8a6001dbf 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
> @@ -542,6 +542,7 @@ &pcie0 {
>  	assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
>  				 <&clk IMX8MM_SYS_PLL2_250M>;
>  	vpcie-supply = <&reg_pcie0>;
> +	supports-clkreq;
>  	status = "okay";
>  };
>
> --
> 2.37.1
>