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Message-ID: <62133fe3-cce8-4405-82b9-8ded092c7eea@tuxon.dev>
Date: Fri, 31 Oct 2025 09:14:13 +0200
From: claudiu beznea <claudiu.beznea@...on.dev>
To: Conor Dooley <conor@...nel.org>
Cc: Conor Dooley <conor.dooley@...rochip.com>,
Daire McNamara <daire.mcnamara@...rochip.com>,
pierre-henry.moussay@...rochip.com, valentina.fernandezalanis@...rochip.com,
Michael Turquette <mturquette@...libre.com>, Stephen Boyd
<sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Philipp Zabel <p.zabel@...gutronix.de>, linux-riscv@...ts.infradead.org,
linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v6 3/7] clk: microchip: mpfs: use regmap for clocks
On 10/29/25 18:11, Conor Dooley wrote:
> From: Conor Dooley<conor.dooley@...rochip.com>
>
> Convert the PolarFire SoC clock driver to use regmaps instead of iomem
> addresses as a preparatory work for supporting the new binding for this
> device that will only provide the second of the two register regions, and
> will require the use of syscon regmap to access the "cfg" and "periph"
> clocks currently supported by the driver.
>
> This is effectively a revert of commit 4da2404bb003 ("clk: microchip:
> mpfs: convert cfg_clk to clk_divider") and commit d815569783e6 ("clk:
> microchip: mpfs: convert periph_clk to clk_gate") as it resurrects the
> ops structures removed in those commits, with the readl()s and
> writel()s replaced by regmap_read()s and regmap_writes()s.
>
> Signed-off-by: Conor Dooley<conor.dooley@...rochip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@...on.dev>
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