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Message-ID: <20251031-iwdg1-v2-1-2dc6e0116725@foss.st.com>
Date: Fri, 31 Oct 2025 11:00:40 +0100
From: Gatien Chevallier <gatien.chevallier@...s.st.com>
To: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Maxime Coquelin
<mcoquelin.stm32@...il.com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>
CC: <devicetree@...r.kernel.org>, <linux-stm32@...md-mailman.stormreply.com>,
<linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
Gatien Chevallier <gatien.chevallier@...s.st.com>
Subject: [PATCH v2 1/4] ARM: dts: stm32: add iwdg1 node in stm32mp131.dtsi
Add the IWDG1 node in the stm32mp131.dtsi SoC device tree file. It can
be used by Linux as the Cortex-A7 watchdog when it's configured as
non-secure.
Signed-off-by: Gatien Chevallier <gatien.chevallier@...s.st.com>
---
arch/arm/boot/dts/st/stm32mp131.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/st/stm32mp131.dtsi b/arch/arm/boot/dts/st/stm32mp131.dtsi
index fd730aa37c22..a18da1a04fe3 100644
--- a/arch/arm/boot/dts/st/stm32mp131.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp131.dtsi
@@ -1657,6 +1657,16 @@ usbphyc_port1: usb-phy@1 {
reg = <1>;
};
};
+
+ iwdg1: watchdog@...03000 {
+ compatible = "st,stm32mp1-iwdg";
+ reg = <0x5c003000 0x400>;
+ interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rcc IWDG1>, <&scmi_clk CK_SCMI_LSI>;
+ clock-names = "pclk", "lsi";
+ access-controllers = <&etzpc 12>;
+ status = "disabled";
+ };
};
/*
--
2.43.0
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