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Message-ID: <176204064246.157916.1254578946904175496.b4-ty@gmail.com>
Date: Sun, 2 Nov 2025 07:44:12 +0800
From: Inochi Amaoto <inochiama@...il.com>
To: u.kleine-koenig@...libre.com,
aou@...s.berkeley.edu,
alex@...ti.fr,
unicorn_wang@...look.com,
conor+dt@...nel.org,
rabenda.cn@...il.com,
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liujingqi@...xincomputing.com,
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pjw@...nel.org,
robh@...nel.org,
tglx@...utronix.de,
sycamoremoon376@...il.com,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
linux-riscv@...ts.infradead.org,
sophgo@...ts.linux.dev,
chao.wei@...hgo.com,
xiaoguang.xing@...hgo.com,
fengchun.li@...hgo.com,
Chen Wang <unicornxw@...il.com>
Cc: Inochi Amaoto <inochiama@...il.com>
Subject: Re: [PATCH 0/4] Add PCIe support in DTS for Sophgo SG2042 SoC
On Mon, 20 Oct 2025 11:32:55 +0800, Chen Wang wrote:
> From: Chen Wang <unicorn_wang@...look.com>
>
> This new patch set is a continuation of the previous patchset
> "[PATCH v3 0/7] Add PCIe support to Sophgo SG2042 SoC" [1].
>
> The drivers and bindings have already been merged into the kernel
> mainline, and this patchset will focus on submitting the remaining
> DTS changes into the mainline.
>
> [...]
Applied to dt/riscv, thanks!
[1/4] riscv: sophgo: dts: add PCIe controllers for SG2042
https://github.com/sophgo/linux/commit/4e27aca4881ace1e9a812fc2c88b33dd84e29993
[2/4] riscv: sophgo: dts: enable PCIe for PioneerBox
https://github.com/sophgo/linux/commit/b85ad0d06a19de95d41f91162389a1bbb461a405
[3/4] riscv: sophgo: dts: enable PCIe for SG2042_EVB_V1.X
https://github.com/sophgo/linux/commit/c6c215099e89b1eb71ed6592163ae5b530f4538e
[4/4] riscv: sophgo: dts: enable PCIe for SG2042_EVB_V2.0
https://github.com/sophgo/linux/commit/579d6526aa43a155c8685a88ef8350a8c29afa47
Thanks,
Inochi
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