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Message-ID: <aQjBbBuZkARkGGan@smile.fi.intel.com>
Date: Mon, 3 Nov 2025 16:51:24 +0200
From: Andy Shevchenko <andriy.shevchenko@...el.com>
To: "Herve Codina (Schneider Electric)" <herve.codina@...tlin.com>
Cc: Wolfram Sang <wsa+renesas@...g-engineering.com>,
	Jonathan Cameron <jic23@...nel.org>,
	David Lechner <dlechner@...libre.com>,
	Nuno Sá <nuno.sa@...log.com>,
	Andy Shevchenko <andy@...nel.org>, Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Geert Uytterhoeven <geert+renesas@...der.be>,
	Magnus Damm <magnus.damm@...il.com>,
	Liam Girdwood <lgirdwood@...il.com>,
	Mark Brown <broonie@...nel.org>, linux-iio@...r.kernel.org,
	linux-renesas-soc@...r.kernel.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	Pascal Eberhard <pascal.eberhard@...com>,
	Miquel Raynal <miquel.raynal@...tlin.com>,
	Thomas Petazzoni <thomas.petazzoni@...tlin.com>
Subject: Re: [PATCH v3 2/4] iio: adc: Add support for the Renesas RZ/N1 ADC

On Mon, Nov 03, 2025 at 03:18:32PM +0100, Herve Codina (Schneider Electric) wrote:
> The Renesas RZ/N1 ADC controller is the ADC controller available in the
> Renesas RZ/N1 SoCs family. It can use up to two internal ADC cores (ADC1
> and ADC2) those internal cores are not directly accessed but are handled
> through ADC controller virtual channels.

Reviewed-by: Andy Shevchenko <andriy.shevchenko@...el.com>

-- 
With Best Regards,
Andy Shevchenko



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