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Message-ID: <176220821193.2601451.18003408663076885327.tip-bot2@tip-bot2>
Date: Mon, 03 Nov 2025 22:16:51 -0000
From: "tip-bot2 for Charles Mirabile" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: kernel test robot <lkp@...el.com>, Charles Mirabile <cmirabil@...hat.com>,
 Thomas Gleixner <tglx@...utronix.de>, x86@...nel.org,
 linux-kernel@...r.kernel.org, maz@...nel.org
Subject: [tip: irq/core] irqchip/sifive-plic: Fix call to __plic_toggle() in
 M-Mode code path

The following commit has been merged into the irq/core branch of tip:

Commit-ID:     3d02464f7b12d3244f2fbc210afcdd0cdb7da4f7
Gitweb:        https://git.kernel.org/tip/3d02464f7b12d3244f2fbc210afcdd0cdb7da4f7
Author:        Charles Mirabile <cmirabil@...hat.com>
AuthorDate:    Mon, 03 Nov 2025 11:18:13 -05:00
Committer:     Thomas Gleixner <tglx@...utronix.de>
CommitterDate: Mon, 03 Nov 2025 23:15:04 +01:00

irqchip/sifive-plic: Fix call to __plic_toggle() in M-Mode code path

The code path for M-Mode linux that disables interrupts for other contexts
was missed when refactoring __plic_toggle().

Since the new version caches updates to the state for the primary context,
its use in this codepath is no longer desireable even if it could be made
correct.

Replace the calls to __plic_toggle() with a loop that simply disables all
of the interrupts in groups of 32 with a direct mmio write.

Fixes: 14ff9e54dd14 ("irqchip/sifive-plic: Cache the interrupt enable state")
Reported-by: kernel test robot <lkp@...el.com>
Signed-off-by: Charles Mirabile <cmirabil@...hat.com>
Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
Link: https://patch.msgid.link/20251103161813.2437427-1-cmirabil@redhat.com
Closes: https://lore.kernel.org/oe-kbuild-all/202510271316.AQM7gCCy-lkp@intel.com/
---
 drivers/irqchip/irq-sifive-plic.c |  9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c
index cbd7697..39ea044 100644
--- a/drivers/irqchip/irq-sifive-plic.c
+++ b/drivers/irqchip/irq-sifive-plic.c
@@ -592,12 +592,11 @@ static int plic_probe(struct fwnode_handle *fwnode)
 		if (parent_hwirq != RV_IRQ_EXT) {
 			/* Disable S-mode enable bits if running in M-mode. */
 			if (IS_ENABLED(CONFIG_RISCV_M_MODE)) {
-				void __iomem *enable_base = priv->regs +
-					CONTEXT_ENABLE_BASE +
-					i * CONTEXT_ENABLE_SIZE;
+				u32 __iomem *enable_base = priv->regs +	CONTEXT_ENABLE_BASE +
+							   i * CONTEXT_ENABLE_SIZE;
 
-				for (hwirq = 1; hwirq <= nr_irqs; hwirq++)
-					__plic_toggle(enable_base, hwirq, 0);
+				for (int j = 0; j <= nr_irqs / 32; j++)
+					writel(0, enable_base + j);
 			}
 			continue;
 		}

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