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Message-Id: <20251103052618.586763-4-anshuman.khandual@arm.com> Date: Mon, 3 Nov 2025 05:26:15 +0000 From: Anshuman Khandual <anshuman.khandual@....com> To: linux-arm-kernel@...ts.infradead.org Cc: Anshuman Khandual <anshuman.khandual@....com>, Catalin Marinas <catalin.marinas@....com>, Will Deacon <will@...nel.org>, Ryan Roberts <ryan.roberts@....com>, Ard Biesheuvel <ardb@...nel.org>, linux-kernel@...r.kernel.org Subject: [PATCH 3/6] arm64/mm: Represent TTBR_BADDR_MASK_52 with TTBRx_EL1_BADDR_MASK TTBR_BADDR_MASK_52 discards bit[1] which is RES0, when TTBRx_EL1 register contains 52 bits PA. Let's just keep the custom macro but redefine it via tools sysreg register field format TTBRx_EL1_BADDR_MASK. Cc: Catalin Marinas <catalin.marinas@....com> Cc: Will Deacon <will@...nel.org> Cc: linux-arm-kernel@...ts.infradead.org Cc: linux-kernel@...r.kernel.org Signed-off-by: Anshuman Khandual <anshuman.khandual@....com> --- arch/arm64/include/asm/pgtable-hwdef.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h index f3b77deedfa2..e192c4dc624b 100644 --- a/arch/arm64/include/asm/pgtable-hwdef.h +++ b/arch/arm64/include/asm/pgtable-hwdef.h @@ -332,7 +332,7 @@ /* * TTBR_ELx[1] is RES0 in this configuration. */ -#define TTBR_BADDR_MASK_52 GENMASK_ULL(47, 2) +#define TTBR_BADDR_MASK_52 (TTBRx_EL1_BADDR_MASK & ~GENMASK(1, 1)) #endif #ifdef CONFIG_ARM64_VA_BITS_52 -- 2.30.2
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