linux-kernel - Re:[PATCH v2 1/1] arm64: dts: xilinx: fix zynqmp opp-table-cpu

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Message-ID: <ecf736bc-c679-4473-be22-a98ed2b2fabb@emerson.com>
Date: Mon, 3 Nov 2025 10:14:28 +0100
From: Thomas Hommel <thomas.hommel@...rson.com>
To: Neal Frager <neal.frager@....com>, gregkh@...uxfoundation.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org, git@....com
Cc: michal.simek@....com, jguittet@...ekio.com, jay.buddhabhatti@....com,
        arun.balaji.kannan@....com, senthilnathan.thangaraj@....com,
        micheal.saleab@....com, robh@...nel.org, krzk+dt@...nel.org,
        conor+dt@...nel.org
Subject: Re:[PATCH v2 1/1] arm64: dts: xilinx: fix zynqmp opp-table-cpu

Reviewed-by: Thomas Hommel <thomas.hommel@...rson.com>

On 03.11.2025 07:53, Neal Frager wrote:

> Since the following commit, the zynqmp clk driver uses the common
> divider_round_rate() when determining the appropriate clock divider for a
> requested clock frequency:
> https://github.com/torvalds/linux/commit/1fe15be1fb613534ecbac5f8c3f8744f757d237d
> 
> This means that the typical parent clock rate will be 1200000000 based on the
> zynqmp pll configuration. If the current zynqmp.dtsi opp-hz values are used,
> this will mean the divider calculations are always slightly above the correct
> integer divider value meaning they will get rounded up to a divider value
> which is one too high. The result of this issue is that the cpu clock speed
> will always be one opp lower than the requested clock rate.
> 
> For example, the following will occur when requesting 1.2 GHz with the current
> zynqmp.dtsi:
> 
> root@...qmp:/sys/kernel/tracing# cat /sys/devices/system/cpu/cpufreq/policy0/scaling_available_frequencies
> 299999 399999 599999 1199999
> root@...qmp:/ # echo 1200000 > /sys/devices/system/cpu/cpufreq/policy0/scaling_setspeed
> root@...qmp:/ # cat /sys/devices/system/cpu/cpufreq/policy0/cpuinfo_cur_freq
> 600000
> 
> To fix this issue, this patch updates the zynqmp opp-table-cpu, so the clock
> rates are calculated correctly.
> 
> root@...qmp:/sys/kernel/tracing# cat /sys/devices/system/cpu/cpufreq/policy0/scaling_available_frequencies
> 300000 400000 600000 1200000
> root@...qmp:/ # echo 1200000 > /sys/devices/system/cpu/cpufreq/policy0/scaling_setspeed
> root@...qmp:/ # cat /sys/devices/system/cpu/cpufreq/policy0/cpuinfo_cur_freq
> 1200000
> 
> Signed-off-by: Neal Frager <neal.frager@....com>
> ---
> V1->V2:
> - The clock-latency-ns and opp-microvolt values did not change, so simplify
>    the patch by only changing the opp-hz values in decimal format.
> ---
>   arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 16 ++++++++--------
>   1 file changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> index 938b014ca923..dd9bd39f61e8 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -103,23 +103,23 @@ CPU_SLEEP_0: cpu-sleep-0 {
>   	cpu_opp_table: opp-table-cpu {
>   		compatible = "operating-points-v2";
>   		opp-shared;
> -		opp00 {
> -			opp-hz = /bits/ 64 <1199999988>;
> +		opp-1200000000 {
> +			opp-hz = /bits/ 64 <1200000000>;
>   			opp-microvolt = <1000000>;
>   			clock-latency-ns = <500000>;
>   		};
> -		opp01 {
> -			opp-hz = /bits/ 64 <599999994>;
> +		opp-600000000 {
> +			opp-hz = /bits/ 64 <600000000>;
>   			opp-microvolt = <1000000>;
>   			clock-latency-ns = <500000>;
>   		};
> -		opp02 {
> -			opp-hz = /bits/ 64 <399999996>;
> +		opp-400000000 {
> +			opp-hz = /bits/ 64 <400000000>;
>   			opp-microvolt = <1000000>;
>   			clock-latency-ns = <500000>;
>   		};
> -		opp03 {
> -			opp-hz = /bits/ 64 <299999997>;
> +		opp-300000000 {
> +			opp-hz = /bits/ 64 <300000000>;
>   			opp-microvolt = <1000000>;
>   			clock-latency-ns = <500000>;
>   		};
> -- 
> 2.25.1
>