[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <20e485b69419ffd518c7aeb16881df429b0a4873.camel@gmail.com>
Date: Mon, 03 Nov 2025 11:34:35 +0000
From: Nuno Sá <noname.nuno@...il.com>
To: "Herve Codina (Schneider Electric)" <herve.codina@...tlin.com>, Wolfram
Sang <wsa+renesas@...g-engineering.com>, Jonathan Cameron
<jic23@...nel.org>, David Lechner <dlechner@...libre.com>, Nuno
Sá <nuno.sa@...log.com>, Andy Shevchenko
<andy@...nel.org>, Rob Herring <robh@...nel.org>, Krzysztof Kozlowski
<krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, Geert
Uytterhoeven <geert+renesas@...der.be>, Magnus Damm
<magnus.damm@...il.com>, Liam Girdwood <lgirdwood@...il.com>, Mark Brown
<broonie@...nel.org>
Cc: linux-iio@...r.kernel.org, linux-renesas-soc@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, Pascal Eberhard
<pascal.eberhard@...com>, Miquel Raynal <miquel.raynal@...tlin.com>, Thomas
Petazzoni <thomas.petazzoni@...tlin.com>
Subject: Re: [PATCH v2 2/4] iio: adc: Add support for the Renesas RZ/N1 ADC
On Wed, 2025-10-29 at 15:46 +0100, Herve Codina (Schneider Electric) wrote:
> The Renesas RZ/N1 ADC controller is the ADC controller available in the
> Renesas RZ/N1 SoCs family. It can use up to two internal ADC cores (ADC1
> and ADC2) those internal cores are not directly accessed but are handled
> through ADC controller virtual channels.
>
> Signed-off-by: Herve Codina (Schneider Electric) <herve.codina@...tlin.com>
> ---
Not much to add to Andy's review. Looks in good shape... Just one small remark
from me. With it and Andy's stuff addressed:
Reviewed-by: Nuno Sá <nuno.sa@...log.com>
> drivers/iio/adc/Kconfig | 10 +
> drivers/iio/adc/Makefile | 1 +
> drivers/iio/adc/rzn1-adc.c | 493 +++++++++++++++++++++++++++++++++++++
> 3 files changed, 504 insertions(+)
> create mode 100644 drivers/iio/adc/rzn1-adc.c
>
> diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
> index 58a14e6833f6..113f6a5c9745 100644
> --- a/drivers/iio/adc/Kconfig
> +++ b/drivers/iio/adc/Kconfig
> @@ -1403,6 +1403,16 @@ config RZG2L_ADC
> To compile this driver as a module, choose M here: the
> module will be called rzg2l_adc.
>
> +config RZN1_ADC
> + tristate "Renesas RZ/N1 ADC driver"
> + depends on ARCH_RZN1 || COMPILE_TEST
> + help
> + Say yes here to build support for the ADC found in Renesas
> + RZ/N1 family.
> +
> + To compile this driver as a module, choose M here: the
> + module will be called rzn1-adc.
> +
> config SC27XX_ADC
> tristate "Spreadtrum SC27xx series PMICs ADC"
> depends on MFD_SC27XX_PMIC || COMPILE_TEST
> diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
> index d008f78dc010..ba7a8a63d070 100644
> --- a/drivers/iio/adc/Makefile
> +++ b/drivers/iio/adc/Makefile
> @@ -123,6 +123,7 @@ obj-$(CONFIG_ROHM_BD79112) += rohm-bd79112.o
> obj-$(CONFIG_ROHM_BD79124) += rohm-bd79124.o
> obj-$(CONFIG_ROCKCHIP_SARADC) += rockchip_saradc.o
> obj-$(CONFIG_RZG2L_ADC) += rzg2l_adc.o
> +obj-$(CONFIG_RZN1_ADC) += rzn1-adc.o
> obj-$(CONFIG_SC27XX_ADC) += sc27xx_adc.o
> obj-$(CONFIG_SD_ADC_MODULATOR) += sd_adc_modulator.o
> obj-$(CONFIG_SOPHGO_CV1800B_ADC) += sophgo-cv1800b-adc.o
> diff --git a/drivers/iio/adc/rzn1-adc.c b/drivers/iio/adc/rzn1-adc.c
> new file mode 100644
> index 000000000000..52ec13adddef
> --- /dev/null
> +++ b/drivers/iio/adc/rzn1-adc.c
> @@ -0,0 +1,493 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Renesas RZ/N1 ADC driver
> + *
> + * Copyright (C) 2025 Schneider-Electric
> + *
> + * Author: Herve Codina <herve.codina@...tlin.com>
> + *
> + * The RZ/N1 ADC controller can handle channels from its internal ADC1 and/or
> + * ADC2 cores. The driver use ADC1 and/or ADC2 cores depending on the presence
> + * of the related power supplies (AVDD and VREF) description in the device-tree.
> + */
...
>
> +
> + platform_set_drvdata(pdev, indio_dev);
> +
If I'm not missing nothing, there's no real need to pass in indio_dev. So, why not
passing rzn1_adc directly and avoid the pointer arithmetic's in the pm callbacks?
- Nuno Sá
Powered by blists - more mailing lists