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Message-ID: <c0780268-74da-42d8-892c-b0cf2b86ffcf@oss.qualcomm.com>
Date: Mon, 3 Nov 2025 14:06:40 +0100
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Xilin Wu <sophon@...xa.com>, Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Neil Armstrong <neil.armstrong@...aro.org>,
Viken Dadhaniya <viken.dadhaniya@....qualcomm.com>,
Ram Kumar Dwivedi <quic_rdwivedi@...cinc.com>
Subject: Re: [PATCH DNM v2 3/5] arm64: dts: qcom: qcs6490-radxa-dragon-q6a:
Enable all available QUP SEs
On 11/3/25 2:04 PM, Xilin Wu wrote:
> On 11/3/2025 8:57 PM, Konrad Dybcio wrote:
>> On 9/14/25 5:57 PM, Xilin Wu wrote:
>>> Add and enable all available QUP SEs on this board, allowing I2C, SPI and
>>> UART functions from the 40-Pin GPIO header to work.
>>>
>>> Signed-off-by: Xilin Wu <sophon@...xa.com>
>>>
>>> ---
>>>
>>> This change depends on the following patch series:
>>> https://lore.kernel.org/all/20250911043256.3523057-1-viken.dadhaniya@oss.qualcomm.com/
>>
>> You should be good to go resending this change now
>
> Thanks for the reminder. I added the QUP parts in v4 of my patch series, and it's already merged :)
>
> https://lore.kernel.org/all/20250929-radxa-dragon-q6a-v5-2-aa96ffc352f8@radxa.com/
I had this patch marked as stale in my inbox, it's good to see
it was delivered after all :)
Konrad>
>
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