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Message-ID:
<SI2PR01MB439351F0B7E54513710BBD3DDCC7A@SI2PR01MB4393.apcprd01.prod.exchangelabs.com>
Date: Mon, 3 Nov 2025 22:00:33 +0800
From: Wei Wang <wei.w.wang@...mail.com>
To: alex@...zbot.org,
jgg@...dia.com,
suravee.suthikulpanit@....com,
thomas.lendacky@....com,
joro@...tes.org
Cc: kevin.tian@...el.com,
wei.w.wang@...mail.com,
linux-kernel@...r.kernel.org,
iommu@...ts.linux.dev
Subject: [PATCH v2 1/2] iommu/amd: Add IOMMU_PROT_IE flag for memory encryption
Introduce the IOMMU_PROT_IE flag to allow callers of iommu_v1_map_pages()
to explicitly request memory encryption for specific mappings.
With SME enabled, the C-bit (encryption bit) in IOMMU page table entries
is now set only when IOMMU_PROT_IE is specified. This provides
fine-grained control over which IOVAs are encrypted through the IOMMU
page tables.
Current PCIe devices and switches do not interpret the C-bit, so applying
it to MMIO mappings would break PCIe peer‑to‑peer communication. Update
the implementation to restrict C-bit usage to non‑MMIO backed IOVAs.
Fixes: 2543a786aa25 ("iommu/amd: Allow the AMD IOMMU to work with memory encryption")
Suggested-by: Jason Gunthorpe <jgg@...dia.com>
Signed-off-by: Wei Wang <wei.w.wang@...mail.com>
---
drivers/iommu/amd/amd_iommu_types.h | 3 ++-
drivers/iommu/amd/io_pgtable.c | 7 +++++--
drivers/iommu/amd/iommu.c | 2 ++
3 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h
index a698a2e7ce2a..5b6ce0286a16 100644
--- a/drivers/iommu/amd/amd_iommu_types.h
+++ b/drivers/iommu/amd/amd_iommu_types.h
@@ -442,9 +442,10 @@
#define IOMMU_PTE_PAGE(pte) (iommu_phys_to_virt((pte) & IOMMU_PAGE_MASK))
#define IOMMU_PTE_MODE(pte) (((pte) >> 9) & 0x07)
-#define IOMMU_PROT_MASK 0x03
+#define IOMMU_PROT_MASK (IOMMU_PROT_IR | IOMMU_PROT_IW | IOMMU_PROT_IE)
#define IOMMU_PROT_IR 0x01
#define IOMMU_PROT_IW 0x02
+#define IOMMU_PROT_IE 0x04
#define IOMMU_UNITY_MAP_FLAG_EXCL_RANGE (1 << 2)
diff --git a/drivers/iommu/amd/io_pgtable.c b/drivers/iommu/amd/io_pgtable.c
index 70c2f5b1631b..ae5032dd3b2f 100644
--- a/drivers/iommu/amd/io_pgtable.c
+++ b/drivers/iommu/amd/io_pgtable.c
@@ -367,11 +367,14 @@ static int iommu_v1_map_pages(struct io_pgtable_ops *ops, unsigned long iova,
if (!iommu_pages_list_empty(&freelist))
updated = true;
+ if (prot & IOMMU_PROT_IE)
+ paddr = __sme_set(paddr);
+
if (count > 1) {
- __pte = PAGE_SIZE_PTE(__sme_set(paddr), pgsize);
+ __pte = PAGE_SIZE_PTE(paddr, pgsize);
__pte |= PM_LEVEL_ENC(7) | IOMMU_PTE_PR | IOMMU_PTE_FC;
} else
- __pte = __sme_set(paddr) | IOMMU_PTE_PR | IOMMU_PTE_FC;
+ __pte = paddr | IOMMU_PTE_PR | IOMMU_PTE_FC;
if (prot & IOMMU_PROT_IR)
__pte |= IOMMU_PTE_IR;
diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index 2e1865daa1ce..eaf024e9dff0 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -2762,6 +2762,8 @@ static int amd_iommu_map_pages(struct iommu_domain *dom, unsigned long iova,
prot |= IOMMU_PROT_IR;
if (iommu_prot & IOMMU_WRITE)
prot |= IOMMU_PROT_IW;
+ if (!(iommu_prot & IOMMU_MMIO))
+ prot |= IOMMU_PROT_IE;
if (ops->map_pages) {
ret = ops->map_pages(ops, iova, paddr, pgsize,
--
2.51.1
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