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Message-ID: <20251104132923.145332-1-xieyuanbin1@huawei.com>
Date: Tue, 4 Nov 2025 21:29:23 +0800
From: Xie Yuanbin <xieyuanbin1@...wei.com>
To: <david@...hat.com>, <dave.hansen@...el.com>, <bp@...en8.de>,
<tglx@...utronix.de>, <mingo@...hat.com>, <dave.hansen@...ux.intel.com>,
<hpa@...or.com>, <akpm@...ux-foundation.org>, <lorenzo.stoakes@...cle.com>,
<Liam.Howlett@...cle.com>, <vbabka@...e.cz>, <rppt@...nel.org>,
<surenb@...gle.com>, <mhocko@...e.com>, <linmiaohe@...wei.com>,
<nao.horiguchi@...il.com>, <luto@...nel.org>, <peterz@...radead.org>,
<tony.luck@...el.com>
CC: <x86@...nel.org>, <linux-kernel@...r.kernel.org>, <linux-mm@...ck.org>,
<linux-edac@...r.kernel.org>, <will@...nel.org>, <liaohua4@...wei.com>,
<lilinjie8@...wei.com>, Xie Yuanbin <xieyuanbin1@...wei.com>
Subject: Re: [PATCH v2 0/2] x86/mm: support memory-failure on 32-bits with SPARSEMEM
> This is a pretty generic description of MCEs.
>
> I think what we are missing is: who runs 32bit OSes on MCE-capable
> hardware (or VMs?) and needs this to work.
>
> What's the use case?
Now, let me try to explain it. From what I understand, it mainly comes
from two aspects:
1. Although almost all new CPUs are 64-bit, there are still many existing
32-bit x86 devices in uses.
2. On some embedded devices, in order to save memory overhead, even with
64-bit CPU hardware, a 32-bit kernel may still be used. You might wonder
why embedded devices need SPARSEMEM. This is because the MEMORY_HOTPLUG
feature depends on SPARSEMEM, not necessarily SPARSEMEM itself.
All of the above devices, the memory-failure feature may be used to
provide reliable memory errors handling, and to minimize service
interruptions as much as possible.
> Cheers
>
> David
Thanks!
Xie Yuanbin
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