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Message-ID: <b9b10943-0ece-495f-a6a8-403fc1ab9213@kernel.org>
Date: Tue, 4 Nov 2025 08:14:08 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Tudor Ambarus <tudor.ambarus@...aro.org>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Alim Akhtar <alim.akhtar@...sung.com>,
Peter Griffin <peter.griffin@...aro.org>,
André Draszik <andre.draszik@...aro.org>,
semen.protsenko@...aro.org, willmcvicker@...gle.com,
kernel-team@...roid.com, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-samsung-soc@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 10/11] arm64: dts: exynos: gs101: add the chipid node
On 03/11/2025 11:50, Tudor Ambarus wrote:
>
>
> On 11/3/25 12:18 PM, Krzysztof Kozlowski wrote:
>> On Fri, Oct 31, 2025 at 12:56:09PM +0000, Tudor Ambarus wrote:
>>> Add the chipid node.
>>>
>>> Signed-off-by: Tudor Ambarus <tudor.ambarus@...aro.org>
>>> ---
>>> arch/arm64/boot/dts/exynos/google/gs101.dtsi | 6 ++++++
>>> 1 file changed, 6 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
>>> index d06d1d05f36408137a8acd98e43d48ea7d4f4292..11622da2d46ff257b447a3dfdc98abdf29a45b9a 100644
>>> --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
>>> +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
>>> @@ -467,6 +467,12 @@ opp-2802000000 {
>>> };
>>> };
>>>
>>> + chipid {
>>> + compatible = "google,gs101-chipid";
>>
>> That's not a real device, sorry.
>>
>> I had some doubts when reading the bindings, then more when reading
>> driver - like chipid probe() was basically empty, no single device
>> access, except calling other kernel subsystem - and now here no single
>> actual hardware resource, except reference to other node.
>>
>> Are you REALLY REALLY sure you have in your datasheet such device as
>> chipid?
>>
>> It is damn basic question, which you should start with.
>
> Documentation says that GS101 "includes a CHIPID block for the software
> that sends and receives APB interface signals to and from the bus system.
> The first address of the SFR region (0x1000_0000) contains the product ID."
So chipid@...0_0000
>
> 0x1000_0000 is the base address of the OTP controller (OTP_CON_TOP).
and efuse@...0_0000 from your other patchset and your sentence above.
Please add them to DTS and check for warnings.
>
> "CHIPID block" tells it's a device, no? But now I think it was just an
> unfortunate datasheet description. Do you have an advice on how I shall
> treat this next please? Maybe register to the soc interface directly from
> the OTP controller driver?
I think in the SoC it is impossible or at least never happening that you
create two devices for the same address, therefore either chipid is a
device or efuse is a device.
Best regards,
Krzysztof
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