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Message-ID: <20251104083605.13677-9-pierre-eric.pelloux-prayer@amd.com>
Date: Tue, 4 Nov 2025 09:35:23 +0100
From: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@....com>
To: Alex Deucher <alexander.deucher@....com>,
Christian König <christian.koenig@....com>, David Airlie
<airlied@...il.com>, Simona Vetter <simona@...ll.ch>, Felix Kuehling
<Felix.Kuehling@....com>
CC: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@....com>,
<amd-gfx@...ts.freedesktop.org>, <dri-devel@...ts.freedesktop.org>,
<linux-kernel@...r.kernel.org>
Subject: [PATCH v1 08/20] drm/amdgpu: allocate multiple move entities
No functional change for now, as we always use entity 0.
Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@....com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 9 +++--
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 48 +++++++++++++++---------
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 3 +-
drivers/gpu/drm/amd/amdkfd/kfd_migrate.c | 2 +-
4 files changed, 39 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
index e73dcfed5338..2713dd51ab9a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
@@ -686,9 +686,10 @@ void amdgpu_gmc_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
* translation. Avoid this by doing the invalidation from the SDMA
* itself at least for GART.
*/
- mutex_lock(&adev->mman.move_entity.gart_window_lock);
for (i = 0; i < adev->mman.num_clear_entities; i++)
mutex_lock(&adev->mman.clear_entities[i].gart_window_lock);
+ for (i = 0; i < adev->mman.num_move_entities; i++)
+ mutex_lock(&adev->mman.move_entities[i].gart_window_lock);
r = amdgpu_job_alloc_with_ib(ring->adev, &adev->mman.default_entity.base,
AMDGPU_FENCE_OWNER_UNDEFINED,
16 * 4, AMDGPU_IB_POOL_IMMEDIATE,
@@ -701,7 +702,8 @@ void amdgpu_gmc_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
job->ibs->ptr[job->ibs->length_dw++] = ring->funcs->nop;
amdgpu_ring_pad_ib(ring, &job->ibs[0]);
fence = amdgpu_job_submit(job);
- mutex_unlock(&adev->mman.move_entity.gart_window_lock);
+ for (i = 0; i < adev->mman.num_move_entities; i++)
+ mutex_unlock(&adev->mman.move_entities[i].gart_window_lock);
for (i = 0; i < adev->mman.num_clear_entities; i++)
mutex_unlock(&adev->mman.clear_entities[i].gart_window_lock);
@@ -711,7 +713,8 @@ void amdgpu_gmc_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
return;
error_alloc:
- mutex_unlock(&adev->mman.move_entity.gart_window_lock);
+ for (i = 0; i < adev->mman.num_move_entities; i++)
+ mutex_unlock(&adev->mman.move_entities[i].gart_window_lock);
for (i = 0; i < adev->mman.num_clear_entities; i++)
mutex_unlock(&adev->mman.clear_entities[i].gart_window_lock);
dev_err(adev->dev, "Error flushing GPU TLB using the SDMA (%d)!\n", r);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index e0e469b73013..1b3945513157 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -401,7 +401,7 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo,
dst.offset = 0;
r = amdgpu_ttm_copy_mem_to_mem(adev,
- &adev->mman.move_entity,
+ &adev->mman.move_entities[0],
&src, &dst,
new_mem->size,
amdgpu_bo_encrypted(abo),
@@ -414,7 +414,7 @@ static int amdgpu_move_blit(struct ttm_buffer_object *bo,
(abo->flags & AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE)) {
struct dma_fence *wipe_fence = NULL;
- r = amdgpu_fill_buffer(&adev->mman.move_entity,
+ r = amdgpu_fill_buffer(&adev->mman.move_entities[0],
abo, 0, NULL, &wipe_fence,
AMDGPU_KERNEL_JOB_ID_MOVE_BLIT);
if (r) {
@@ -2167,10 +2167,11 @@ u32 amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev, bool enable)
struct ttm_resource_manager *man = ttm_manager_type(&adev->mman.bdev, TTM_PL_VRAM);
uint64_t size;
int r, i, j;
- u32 num_clear_entities, windows, w;
+ u32 num_clear_entities, num_move_entities, windows, w;
num_clear_entities = adev->sdma.num_instances;
- windows = adev->gmc.is_app_apu ? 0 : (2 + num_clear_entities);
+ num_move_entities = MIN(adev->sdma.num_instances, TTM_FENCES_MAX_SLOT_COUNT);
+ windows = adev->gmc.is_app_apu ? 0 : (2 * num_move_entities + num_clear_entities);
if (!adev->mman.initialized || amdgpu_in_reset(adev) ||
adev->mman.buffer_funcs_enabled == enable || adev->gmc.is_app_apu)
@@ -2186,20 +2187,25 @@ u32 amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev, bool enable)
DRM_SCHED_PRIORITY_KERNEL, &sched,
1, NULL);
if (r) {
- dev_err(adev->dev,
- "Failed setting up TTM BO eviction entity (%d)\n",
+ dev_err(adev->dev, "Failed setting up entity (%d)\n",
r);
return 0;
}
- r = drm_sched_entity_init(&adev->mman.move_entity.base,
- DRM_SCHED_PRIORITY_NORMAL, &sched,
- 1, NULL);
- if (r) {
- dev_err(adev->dev,
- "Failed setting up TTM BO move entity (%d)\n",
- r);
- goto error_free_entity;
+ adev->mman.num_move_entities = num_move_entities;
+ for (i = 0; i < num_move_entities; i++) {
+ r = drm_sched_entity_init(&adev->mman.move_entities[i].base,
+ DRM_SCHED_PRIORITY_NORMAL, &sched,
+ 1, NULL);
+ if (r) {
+ dev_err(adev->dev,
+ "Failed setting up TTM BO move entities (%d)\n",
+ r);
+ for (j = 0; j < i; j++)
+ drm_sched_entity_destroy(
+ &adev->mman.move_entities[j].base);
+ goto error_free_entity;
+ }
}
adev->mman.num_clear_entities = num_clear_entities;
@@ -2214,6 +2220,9 @@ u32 amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev, bool enable)
DRM_SCHED_PRIORITY_NORMAL, &sched,
1, NULL);
if (r) {
+ for (j = 0; j < num_move_entities; j++)
+ drm_sched_entity_destroy(
+ &adev->mman.move_entities[j].base);
for (j = 0; j < i; j++)
drm_sched_entity_destroy(
&adev->mman.clear_entities[j].base);
@@ -2225,9 +2234,11 @@ u32 amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev, bool enable)
/* Statically assign GART windows to each entity. */
w = 0;
mutex_init(&adev->mman.default_entity.gart_window_lock);
- adev->mman.move_entity.gart_window_id0 = w++;
- adev->mman.move_entity.gart_window_id1 = w++;
- mutex_init(&adev->mman.move_entity.gart_window_lock);
+ for (i = 0; i < num_move_entities; i++) {
+ adev->mman.move_entities[i].gart_window_id0 = w++;
+ adev->mman.move_entities[i].gart_window_id1 = w++;
+ mutex_init(&adev->mman.move_entities[i].gart_window_lock);
+ }
for (i = 0; i < num_clear_entities; i++) {
/* Clearing entities don't use id0 */
adev->mman.clear_entities[i].gart_window_id1 = w++;
@@ -2236,7 +2247,8 @@ u32 amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev, bool enable)
WARN_ON(w != windows);
} else {
drm_sched_entity_destroy(&adev->mman.default_entity.base);
- drm_sched_entity_destroy(&adev->mman.move_entity.base);
+ for (i = 0; i < num_move_entities; i++)
+ drm_sched_entity_destroy(&adev->mman.move_entities[i].base);
for (i = 0; i < num_clear_entities; i++)
drm_sched_entity_destroy(&adev->mman.clear_entities[i].base);
for (i = 0; i < TTM_FENCES_MAX_SLOT_COUNT; i++) {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
index e7ada4605472..2874f054e869 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
@@ -72,9 +72,10 @@ struct amdgpu_mman {
struct mutex gtt_window_lock;
struct amdgpu_ttm_entity default_entity; /* has no gart windows */
- struct amdgpu_ttm_entity move_entity;
struct amdgpu_ttm_entity *clear_entities;
u32 num_clear_entities;
+ struct amdgpu_ttm_entity move_entities[TTM_FENCES_MAX_SLOT_COUNT];
+ u32 num_move_entities;
struct amdgpu_vram_mgr vram_mgr;
struct amdgpu_gtt_mgr gtt_mgr;
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c b/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
index 7aade289f32a..5daacb816cf7 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
@@ -136,7 +136,7 @@ svm_migrate_copy_memory_gart(struct amdgpu_device *adev, dma_addr_t *sys,
u64 size;
int r;
- entity = &adev->mman.move_entity;
+ entity = &adev->mman.move_entities[0];
mutex_lock(&entity->gart_window_lock);
--
2.43.0
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