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Message-ID: <155234efaf55f5e481ab97f48dad321037a4add8.camel@mediatek.com>
Date: Tue, 4 Nov 2025 09:29:17 +0000
From: LIANKUN YANG (杨连坤) <Liankun.Yang@...iatek.com>
To: Peng Liu (刘鹏) <Peng.Liu@...iatek.com>,
Mac Shen (沈俊) <Mac.Shen@...iatek.com>,
"chunkuang.hu@...nel.org" <chunkuang.hu@...nel.org>, "simona@...ll.ch"
<simona@...ll.ch>, "p.zabel@...gutronix.de" <p.zabel@...gutronix.de>,
CK Hu (胡俊光) <ck.hu@...iatek.com>,
Project_Global_Chrome_Upstream_Group
<Project_Global_Chrome_Upstream_Group@...iatek.com>, "airlied@...il.com"
<airlied@...il.com>, "matthias.bgg@...il.com" <matthias.bgg@...il.com>,
AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
CC: "dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>, "linux-mediatek@...ts.infradead.org"
<linux-mediatek@...ts.infradead.org>, "linux-kernel@...r.kernel.org"
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v6 1/1] drm/mediatek: Adjust bandwidth limit for DP
On Mon, 2025-09-01 at 07:08 +0000, CK Hu (胡俊光) wrote:
> On Fri, 2025-08-22 at 20:04 +0800, Liankun Yang wrote:
> > By adjusting the order of link training and relocating it to HPD,
> > link training can identify the usability of each lane in the
> > current link.
> >
> > It also supports handling signal instability and weakness due to
> > environmental issues, enabling the acquisition of a stable
> > bandwidth
> > for the current link. Subsequently, DP work can proceed based on
> > the actual maximum bandwidth.
> >
> > It should training in the hpd event thread.
> > Check the mode with lane count and link rate of training.
> >
> > If we're eDP and capabilities were already parsed we can skip
> > reading again because eDP panels aren't hotpluggable hence the
> > caps and training information won't ever change in a boot life
> >
> > Therefore, bridge typec judgment is required for edp training in
> > atomic_enable function.
> >
> > Signed-off-by: Liankun Yang <liankun.yang@...iatek.com>
> > ---
> > Change in V6:
> > - Fixed power on in atomic enable.
> > - Fixed parse capability for edp.
> > Per suggestion from the previous thread:
> >
https://urldefense.com/v3/__https://patchwork.kernel.org/project/linux-mediatek/patch/20250630080824.7107-1-liankun.yang@mediatek.com/__;!!CTRNKA9wMg0ARbw!kSLrY_ehXtIJ21a_ljnX7EmDtD92n8RfjW9Jee6qRfKzC8ekpkvvRcMoJRIo03WgQAm_L7R3zKrr5kS1FUKM6ag$
> >
> >
> > Change in V5:
> > - Fixed the issue that the 4th version of the patch caused DP to
> > have no screen.
> > Per suggestion from the previous thread:
> >
https://urldefense.com/v3/__https://patchwork.kernel.org/project/linux-mediatek/patch/20250625095446.31726-1-liankun.yang@mediatek.com/__;!!CTRNKA9wMg0ARbw!kSLrY_ehXtIJ21a_ljnX7EmDtD92n8RfjW9Jee6qRfKzC8ekpkvvRcMoJRIo03WgQAm_L7R3zKrr5kS1Nx-fs5M$
> >
> >
> > Change in V4:
> > - Tested the internal eDP display on MT8195 Tomato and it is fine.
> > Per suggestion from the previous thread:
> >
https://urldefense.com/v3/__https://patchwork.kernel.org/project/linux-mediatek/patch/20250318140236.13650-2-liankun.yang@mediatek.com/__;!!CTRNKA9wMg0ARbw!kSLrY_ehXtIJ21a_ljnX7EmDtD92n8RfjW9Jee6qRfKzC8ekpkvvRcMoJRIo03WgQAm_L7R3zKrr5kS1osP1SG0$
> >
> >
> > Change in V3:
> > - Remove 'mtk_dp->enabled = false" in atomic disable.
> > - Remove 'mtk_dp->enabled = true" in atomic enable.
> > Per suggestion from the previous thread:
> >
https://urldefense.com/v3/__https://patchwork.kernel.org/project/linux-mediatek/patch/20241025083036.8829-4-liankun.yang@mediatek.com/__;!!CTRNKA9wMg0ARbw!kSLrY_ehXtIJ21a_ljnX7EmDtD92n8RfjW9Jee6qRfKzC8ekpkvvRcMoJRIo03WgQAm_L7R3zKrr5kS1MjQ5GiU$
> >
> >
> > Change in V2:
> > - Adjust DP training timing.
> > - Adjust parse capabilities timing.
> > - Add power on/off for connect/disconnect.
> > Per suggestion from the previous thread:
> >
https://urldefense.com/v3/__https://patchwork.kernel.org/project/linux-mediatek/patch/20240315015233.2023-1-liankun.yang@mediatek.com/__;!!CTRNKA9wMg0ARbw!kSLrY_ehXtIJ21a_ljnX7EmDtD92n8RfjW9Jee6qRfKzC8ekpkvvRcMoJRIo03WgQAm_L7R3zKrr5kS1iJHpMzY$
> >
> > ---
> > drivers/gpu/drm/mediatek/mtk_dp.c | 41 ++++++++++++++++++++++++---
> > ----
> > 1 file changed, 32 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/mediatek/mtk_dp.c
> > b/drivers/gpu/drm/mediatek/mtk_dp.c
> > index bef6eeb30d3e..384496e49118 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_dp.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_dp.c
> > @@ -1976,6 +1976,7 @@ static irqreturn_t
> > mtk_dp_hpd_event_thread(int hpd, void *dev)
> > struct mtk_dp *mtk_dp = dev;
> > unsigned long flags;
> > u32 status;
> > + int ret;
> >
> > if (mtk_dp->need_debounce && mtk_dp-
> > >train_info.cable_plugged_in)
> > msleep(100);
> > @@ -1994,9 +1995,28 @@ static irqreturn_t
> > mtk_dp_hpd_event_thread(int hpd, void *dev)
> > memset(&mtk_dp->info.audio_cur_cfg, 0,
> > sizeof(mtk_dp->info.audio_cur_cfg));
> >
> > + mtk_dp->enabled = false;
>
> I'm not sure eDP would have hot-plug event or not.
> If eDP also has hot-plug event (once), add do this only for DP
>
> if (mtk_dp->data->bridge_type != DRM_MODE_CONNECTOR_eDP) {
> /* Action only for DP */
> }
>
> > + /* power off aux */
> > + mtk_dp_update_bits(mtk_dp,
> > MTK_DP_TOP_PWR_STATE,
> > + DP_PWR_STATE_BANDGAP_TPLL,
> > + DP_PWR_STATE_MASK);
>
> Why not use mtk_dp_aux_panel_poweron(mtk_dp, false)?
> When plug in, you call mtk_dp_aux_panel_poweron(mtk_dp, true),
> I would like it to be symmetric.
> If not symmetric, add comment to describe why it's not symmetric.
>
Hi CK,
The `mtk_dp_aux_panel_poweron` function fails to align.
Within the `mtk_dp_hpd_event_thread`, if DP is disconnected,
the `mtk_dp_aux_panel_poweron` function will write from `aux` to
`DPRX`,causing a failure.
Therefore, it's not symmetric.
Regards,
Liankun Yang
> > +
> > mtk_dp->need_debounce = false;
> > mod_timer(&mtk_dp->debounce_timer,
> > jiffies + msecs_to_jiffies(100) - 1);
> > + } else {
> > + mtk_dp_aux_panel_poweron(mtk_dp, true);
> > +
> > + ret = mtk_dp_parse_capabilities(mtk_dp);
> > + if (ret)
> > + drm_err(mtk_dp->drm_dev, "Can't parse
> > capabilities\n");
> > +
> > + /* Training */
> > + ret = mtk_dp_training(mtk_dp);
> > + if (ret)
> > + drm_err(mtk_dp->drm_dev, "Training
> > failed, %d\n", ret);
> > +
> > + mtk_dp->enabled = true;
> > }
> > }
> >
> > @@ -2167,7 +2187,8 @@ static const struct drm_edid
> > *mtk_dp_edid_read(struct drm_bridge *bridge,
> > * Parse capability here to let atomic_get_input_bus_fmts and
> > * mode_valid use the capability to calculate sink bitrates.
> > */
> > - if (mtk_dp_parse_capabilities(mtk_dp)) {
> > + if (mtk_dp->bridge.type == DRM_MODE_CONNECTOR_eDP &&
> > + mtk_dp_parse_capabilities(mtk_dp)) {
>
> I think this modification is related to what you say:
>
> "If we're eDP and capabilities were already parsed we can skip
> reading again because eDP panels aren't hotpluggable hence the
> caps and training information won't ever change in a boot life"
>
> I think this modification is not related to the title.
> This is to improve eDP function not DP.
> So separate this to another patch.
> > drm_err(mtk_dp->drm_dev, "Can't parse capabilities\n");
> > drm_edid_free(drm_edid);
> > drm_edid = NULL;
> > @@ -2355,6 +2376,7 @@ static void
> > mtk_dp_bridge_atomic_enable(struct drm_bridge *bridge,
> > struct drm_atomic_state *state)
> > {
> > struct mtk_dp *mtk_dp = mtk_dp_from_bridge(bridge);
> > + bool enabled = mtk_dp->enabled;
> > int ret;
> >
> > mtk_dp->conn = drm_atomic_get_new_connector_for_encoder(state,
> > @@ -2365,13 +2387,16 @@ static void
> > mtk_dp_bridge_atomic_enable(struct drm_bridge *bridge,
> > return;
> > }
> >
> > - mtk_dp_aux_panel_poweron(mtk_dp, true);
> > + if (!enabled)
> > + mtk_dp_aux_panel_poweron(mtk_dp, true);
> >
> > - /* Training */
> > - ret = mtk_dp_training(mtk_dp);
> > - if (ret) {
> > - drm_err(mtk_dp->drm_dev, "Training failed, %d\n", ret);
> > - goto power_off_aux;
> > + if (mtk_dp->data->bridge_type == DRM_MODE_CONNECTOR_eDP) {
> > + /* Training */
> > + ret = mtk_dp_training(mtk_dp);
> > + if (ret) {
> > + drm_err(mtk_dp->drm_dev, "Training failed,
> > %d\n", ret);
> > + goto power_off_aux;
> > + }
> > }
>
> if (mtk_dp->data->bridge_type == DRM_MODE_CONNECTOR_eDP) {
> mtk_dp_aux_panel_poweron(mtk_dp, true);
>
> /* Training */
> ret = mtk_dp_training(mtk_dp);
> if (ret) {
> drm_err(mtk_dp->drm_dev, "Training failed, %d\n", ret);
> goto power_off_aux;
> }
> }
>
> >
> > ret = mtk_dp_video_config(mtk_dp);
> > @@ -2391,7 +2416,6 @@ static void
> > mtk_dp_bridge_atomic_enable(struct drm_bridge *bridge,
> > sizeof(mtk_dp->info.audio_cur_cfg));
> > }
> >
> > - mtk_dp->enabled = true;
>
> if (mtk_dp->data->bridge_type == DRM_MODE_CONNECTOR_eDP)
> mtk_dp->enabled = true;
>
> > mtk_dp_update_plugged_status(mtk_dp);
> >
> > return;
> > @@ -2406,7 +2430,6 @@ static void
> > mtk_dp_bridge_atomic_disable(struct drm_bridge *bridge,
> > {
> > struct mtk_dp *mtk_dp = mtk_dp_from_bridge(bridge);
> >
> > - mtk_dp->enabled = false;
>
> if (mtk_dp->data->bridge_type == DRM_MODE_CONNECTOR_eDP)
> mtk_dp->enabled = false;
>
> Regards,
> CK
>
> > mtk_dp_update_plugged_status(mtk_dp);
> > mtk_dp_video_enable(mtk_dp, false);
> > mtk_dp_audio_mute(mtk_dp, true);
>
>
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