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Message-ID: <aQtkbxi9KJGOLLCC@e133380.arm.com>
Date: Wed, 5 Nov 2025 14:51:27 +0000
From: Dave Martin <Dave.Martin@....com>
To: "Luck, Tony" <tony.luck@...el.com>
Cc: Christophe JAILLET <christophe.jaillet@...adoo.fr>,
Reinette Chatre <reinette.chatre@...el.com>,
James Morse <james.morse@....com>, Babu Moger <babu.moger@....com>,
linux-kernel@...r.kernel.org, kernel-janitors@...r.kernel.org
Subject: Re: [PATCH] fs/resctrl: Slightly optimize cbm_validate()
Hi,
On Mon, Nov 03, 2025 at 10:17:16AM -0800, Luck, Tony wrote:
> On Mon, Oct 27, 2025 at 11:43:49AM +0000, Dave Martin wrote:
> > Hi,
> >
> > [Tony, I have a side question on min_cbm_bits -- see below.]
> > [...]
> >
> > <aside>
> >
> > Also, not directly related to this patch, but, looking at the final if
> > statement:
> >
> > if ((zero_bit - first_bit) < r->cache.min_cbm_bits) {
> > rdt_last_cmd_printf("Need at least %d bits in the mask\n",
> > r->cache.min_cbm_bits);
> > return false;
> > }
> >
> > If min_cbm_bits is two or greater, this can fail if the bitmap has
> > enough contiguous set bits but not in the first block of set bits,
> > and it can succeed if there are blocks of set bits beyond the first
> > block, that have fewer than min_cbm_bits.
> >
> > Is that intended? Do we ever expect arch_has_sparse_bitmasks alongside
> > min_cbm_bits > 1, or should these be mutually exclusive?
> >
> > </aside>
>
> There's no enumeration for the minimium number of bits in a CBM mask.
> Haswell (first to implemenent L3 cache allocation) got a quirk to
> to set it to "2". I don't expect that we'd do that again.
>
> So safe to assume that resctrl doesn't have to handle the combination
> of min_cbm_bits > 1 with arch_has_sparse_bitmasks.
>
> -Tony
OK. A min_cbm_bits value > 1 seems unlikely with sparse bitmasks
anyway. If the hardware has independent storage for each bit, there
would be no need for such a constraint... so I would be surprised to
see this in practice.
Just wanted to check that I wasn't missing something!
In MPAM, bitmap controls always allow each bit to be controlled
independently, according to the architecture.
Cheers
---Dave
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