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Message-ID: <42uppdj3ehrnihk7xnejblgla6enenqgredjpe4vknur7iof6r@4d2yi6zataqp>
Date: Wed, 5 Nov 2025 19:59:17 +0000
From: Yosry Ahmed <yosry.ahmed@...ux.dev>
To: Sean Christopherson <seanjc@...gle.com>
Cc: Paolo Bonzini <pbonzini@...hat.com>, Jim Mattson <jmattson@...gle.com>,
kvm@...r.kernel.org, linux-kernel@...r.kernel.org, stable@...r.kernel,
Matteo Rizzo <matteorizzo@...gle.com>
Subject: Re: [PATCH 2/3] KVM: nSVM: Propagate SVM_EXIT_CR0_SEL_WRITE
correctly for LMSW emulation
On Wed, Nov 05, 2025 at 11:44:27AM -0800, Sean Christopherson wrote:
> On Fri, Oct 24, 2025, Yosry Ahmed wrote:
> > When emulating L2 instructions, svm_check_intercept() checks whether a
> > write to CR0 should trigger a synthesized #VMEXIT with
> > SVM_EXIT_CR0_SEL_WRITE. For MOV-to-CR0, SVM_EXIT_CR0_SEL_WRITE is only
> > triggered if any bit other than CR0.MP and CR0.TS is updated. However,
> > according to the APM (24593—Rev. 3.42—March 2024, Table 15-7):
> >
> > The LMSW instruction treats the selective CR0-write
> > intercept as a non-selective intercept (i.e., it intercepts
> > regardless of the value being written).
> >
> > Skip checking the changed bits for x86_intercept_lmsw and always inject
> > SVM_EXIT_CR0_SEL_WRITE.
> >
> > Fixes: cfec82cb7d31 ("KVM: SVM: Add intercept check for emulated cr accesses")
> > Cc: stable@...r.kernel
>
> Bad email (mostly in case you're using a macro for this; the next patch has the
> same typo).
Yeah I realized after sending it. Will fixup if there's a new version.
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