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Message-ID: <20251105054548.2347569-1-xueyao.an@oss.qualcomm.com>
Date: Wed, 5 Nov 2025 13:45:47 +0800
From: Xueyao An <xueyao.an@....qualcomm.com>
To: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v1] arm64: dts: qcom: HAMOA-IOT-SOM: Unreserve GPIOs blocking SPI11 access
GPIOs 44-47 were previously reserved, preventing Linux from accessing
SPI11 (qupv1_se3). Since there is no TZ use case for these pins on Linux,
they can be safely unreserved. Removing them from the reserved list
resolves the SPI11 access issue for Linux.
Signed-off-by: Xueyao An <xueyao.an@....qualcomm.com>
---
arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi b/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi
index 1aead50b8920..107ea8045f55 100644
--- a/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi
+++ b/arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi
@@ -451,8 +451,7 @@ &remoteproc_cdsp {
};
&tlmm {
- gpio-reserved-ranges = <34 2>, /* TPM LP & INT */
- <44 4>; /* SPI (TPM) */
+ gpio-reserved-ranges = <34 2>; /* TPM LP & INT */
pcie4_default: pcie4-default-state {
clkreq-n-pins {
--
2.43.0
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