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Message-ID: <aQsjdAClmmKPLHWM@horms.kernel.org>
Date: Wed, 5 Nov 2025 10:14:12 +0000
From: Simon Horman <horms@...nel.org>
To: Meghana Malladi <m-malladi@...com>
Cc: h-mittal1@...com, pabeni@...hat.com, kuba@...nel.org,
	edumazet@...gle.com, davem@...emloft.net, andrew+netdev@...n.ch,
	linux-kernel@...r.kernel.org, netdev@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org, srk@...com,
	Vignesh Raghavendra <vigneshr@...com>,
	Roger Quadros <rogerq@...nel.org>, danishanwar@...com
Subject: Re: [PATCH net v2] net: ti: icssg-prueth: Fix fdb hash size
 configuration

On Tue, Nov 04, 2025 at 04:14:15PM +0530, Meghana Malladi wrote:
> The ICSSG driver does the initial FDB configuration which
> includes setting the control registers. Other run time
> management like learning is managed by the PRU's. The default
> FDB hash size used by the firmware is 512 slots, which is
> currently missing in the current driver. Update the driver
> FDB config to include FDB hash size as well.
> 
> Please refer trm [1] 6.4.14.12.17 section on how the FDB config
> register gets configured. From the table 6-1404, there is a reset
> field for FDB_HAS_SIZE which is 4, meaning 1024 slots. Currently
> the driver is not updating this reset value from 4(1024 slots) to
> 3(512 slots). This patch fixes this by updating the reset value
> to 512 slots.
> 
> [1]: https://www.ti.com/lit/pdf/spruim2
> Fixes: abd5576b9c57f ("net: ti: icssg-prueth: Add support for ICSSG switch firmware")
> Signed-off-by: Meghana Malladi <m-malladi@...com>
> ---
> 
> v2-v1:
> - Update the commit message and give more context w.r.t hardware
>   for the fix as suggested by Simon Horman <horms@...nel.org>
> 
> v1: https://lore.kernel.org/all/20251013085925.1391999-1-m-malladi@ti.com/

Thanks for the updated commit message, this seems much clearer to me.

Sorry for not responding to your reply to my review of v1. For some
reason I missed it until I checked the link above a few moments ago.

Reviewed-by: Simon Horman <horms@...nel.org>

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