linux-kernel - Re: [PATCH v7 2/3] arm64: dts: ti: k3-am62l: add initial infrastructure

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <20251105142242.gly4brezn4lnlfkv@bryanbrattlof.com>
Date: Wed, 5 Nov 2025 08:22:42 -0600
From: Bryan Brattlof <bb@...com>
To: Sascha Hauer <s.hauer@...gutronix.de>
CC: Nishanth Menon <nm@...com>, Vignesh Raghavendra <vigneshr@...com>, "Andrew
 Davis" <afd@...com>, Tero Kristo <kristo@...nel.org>, Rob Herring
	<robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
	<conor+dt@...nel.org>, Linus Walleij <linus.walleij@...aro.org>, "Tony
 Lindgren" <tony@...mide.com>, <linux-arm-kernel@...ts.infradead.org>,
	<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
	<linux-gpio@...r.kernel.org>
Subject: Re: [PATCH v7 2/3] arm64: dts: ti: k3-am62l: add initial
 infrastructure

On November  3, 2025 thus sayeth Sascha Hauer:
> On Fri, Oct 31, 2025 at 09:08:05AM -0500, Bryan Brattlof wrote:
> > +	gpio0: gpio@...000 {
> > +		compatible = "ti,am64-gpio", "ti,keystone-gpio";
> > +		reg = <0x00 0x00600000 0x00 0x100>;
> > +		gpio-controller;
> > +		#gpio-cells = <2>;
> > +		interrupt-parent = <&gic500>;
> > +		interrupts = <GIC_SPI 260 IRQ_TYPE_EDGE_RISING>,
> > +			     <GIC_SPI 261 IRQ_TYPE_EDGE_RISING>,
> > +			     <GIC_SPI 262 IRQ_TYPE_EDGE_RISING>,
> > +			     <GIC_SPI 263 IRQ_TYPE_EDGE_RISING>,
> > +			     <GIC_SPI 264 IRQ_TYPE_EDGE_RISING>,
> > +			     <GIC_SPI 265 IRQ_TYPE_EDGE_RISING>,
> > +			     <GIC_SPI 266 IRQ_TYPE_EDGE_RISING>,
> > +			     <GIC_SPI 267 IRQ_TYPE_EDGE_RISING>;
> > +		interrupt-controller;
> > +		#interrupt-cells = <2>;
> > +		power-domains = <&scmi_pds 34>;
> > +		clocks = <&scmi_clk 140>;
> > +		clock-names = "gpio";
> > +		ti,ngpio = <126>;
> > +		ti,davinci-gpio-unbanked = <0>;
> > +		status = "disabled";
> 
> Virtually all boards use GPIOs and a GPIO controller doesn't have any
> external dependencies, so could you enable them by default like done on
> many other SoCs?
> 

Yeah that is fair. I'll enable this.

> > +
> > +	target-module@...00050 {
> > +		compatible = "ti,sysc-omap2", "ti,sysc";
> > +		reg = <0x00 0x2b300050 0x00 0x4>,
> > +		      <0x00 0x2b300054 0x00 0x4>,
> > +		      <0x00 0x2b300058 0x00 0x4>;
> > +		reg-names = "rev", "sysc", "syss";
> > +		ranges = <0x00 0x00 0x2b300000 0x100000>;
> > +		#address-cells = <1>;
> > +		#size-cells = <1>;
> > +		power-domains = <&scmi_pds 83>;
> > +		clocks = <&scmi_clk 324>;
> > +		clock-names = "fck";
> > +		ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
> > +				 SYSC_OMAP2_SOFTRESET |
> > +				 SYSC_OMAP2_AUTOIDLE)>;
> > +		ti,sysc-sidle = <SYSC_IDLE_FORCE>,
> > +				<SYSC_IDLE_NO>,
> > +				<SYSC_IDLE_SMART>,
> > +				<SYSC_IDLE_SMART_WKUP>;
> > +		ti,syss-mask = <1>;
> > +		ti,no-reset-on-init;
> > +		status = "disabled";
> 
> This node is present on many other TI SoCs, all I have looked at have
> this node enabled by default. I think it makes sense to have this node
> enabled given that it has child nodes like this UART:
> 

I agree as well. 


Thanks again Sascha

~Bryan